Theory Of Operation And Clocking; State-Per-Transfer Mode; State-Per-Clock Mode - HP E2416B User Manual

Analysis probe for intel 80196
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Theory of operation and clocking

Theory of operation and clocking
The HP E2416B Analysis Probe has three modes of operation:
State-per-transfer, State-per-clock, and Timing. The figure on the following
page shows a block diagram of the analysis probe.

State-per-transfer mode

State-per-transfer is the default mode set up by the configuration software.
In State-per-transfer mode, the analysis probe demultiplexes the 16-bit
address/data bus into 16-bit address and 16-bit data. The address/data bus
goes through two levels of latches. The first level is flowthrough latches,
which provides information to the logic analyzer about the data bus. The
second level latches on the falling edge of ALE to capture address
information.
The separate READ# and WRITE# signals are combined to create the RW#
signal for easy viewing. The signals RD#, WRL#/WR#, and WRH#/BHE#
cannot be viewed in State-per-transfer mode because they do not meet the
timing requirement. These signals can be viewed in State-per-clock mode
and Timing mode.
The two switch settings for BUSWIDTH and WRITE modes, which are set on
the analysis probe hardware, provide additional information for the inverse
assembler to decode the data.
The analysis probe generates a master clock to clock information to the logic
analyzer when Read or Write is deasserted.
The analysis probe captures DMA bus cycles as if they are microprocessor
cycles, and the inverse assembler attempts to decode them into 80196 codes.
If you do not need to capture DMA cycles, you can filter them out with the
Trigger menu (refer to chapter 3).

State-per-clock mode

In State-per-clock mode, a state is captured on every rising edge of the
microprocessor clock, regardless of the validity of the bus cycle. To use
State-per-clock mode, change the clock in the Format menu from J rising
edge to K rising edge. K clock is a duplicate of the microprocessor CLKOUT.
Inverse assembly is not supported in State-per-clock mode.
HP E2416B 80196 Analysis Probe
4-5

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