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Logic Analyzer Configuration
The following sections describe the logic analyzer configuration as set
up by the configuration files.
Trigger specification
The trigger specification is set up by the software to store all states. If you
modify the trigger specification to store only selected bus cycles, incorrect or
incomplete inverse assembly may result.
Format specification display
The 80196 configuration files contain predefined format specifications. These
format specifications include all labels for monitoring the microprocessor.
Many of the 80196 signals are multiplexed, such as HLDA# and P1.5. The
same pin is listed twice in the Format menu. When analyzing the
information, determine which mode the microprocessor is operating in, and
use the appropriate labels for that mode.
Chapter 4 of this guide contains a table that lists the signals for the 80196
processor and on which pod and probe line the signal comes to the logic
analyzer. Refer to this table in Chapter 4 and to the logic analyzer connection
information for your analyzer in Chapter 2 to determine where the processor
signals should be on the format specification screen.
Do not modify the ADDR, DATA, or STAT labels in the format specification if
you want inverse assembly. Changes to these labels may cause incorrect or
incomplete inverse assembly.
The following screen shows the Format specification display.
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HP E2416B 80196 Analysis Probe
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