F2A: V_In Block Diagram (Aj-Ya931G, Aj-Ya932G: Option) - Panasonic DVCPRO50 Service Manual

F2A: V_IN BLOCK DIAGRAM (AJ-YA931G, AJ-YA932G: OPTION)

Q3100<3>
P100 P3001
24B 8B VIDEO_IN BUF
IC3100<3>
13
15
RET_Y
NENT_L
2
P3001 P3001
17C 12A AIN_L
AIN_L
P1 P3001
23A 23A
IC3900<18>
26A 26A
IN_BUFF
23B 23B
AV_ADRS[0-10] 2-9
25B 25B
22C 22C
25C 25C
26C 26C AV_IOWR_L 4 16
7-9 11-13
27A 27A AV_RST_L 3 17
5 15
26B 26B AV_IORD_L AV_BUS
22A 22B AV_CS_VIN_L
2 18
IC3901<18>
P1 P3001
DIR
28A 28A
OE
1 19
29A 29A
IN_BUFF
27B 27B
AV_DATA[0-7] 2-9
11-18
29B 29B
27C 27C
IC3902<18>
29C 29C
P100 P3001 IC3950<19> IP3950<19>
27B 6A ISP_TDI 4 16 13
27C 6B ISP_TMS 6 14 25
26A 6C ISP_TCK 8 12 32
27A 7A ISP_TDO 18 2 28
ROM
for FPGA
BUFF
P1 P3001
9
7C 7C CONF_INFO 2,7,
10,31
1
P100 P3001
27D 7B ISP_SEL1
23B 9B Y_IN BUF
Q3500<11>
P100
23C 10B PB_IN BUF
Q3501<11>
P100
23D 11B PR_IN BUF
Q3502<11>
M2_L
NTSC only
IC3152<4>
FL3100<3> Q3150-3154<4>
18 7 24
LPF AMP 1st_A/D
Q3156
IC3150<4>
IC3101<3>
2 4
CLP
SYNC
CLAMP
SEP
5 16
7
13
3 RSTH
17
V_DET
VR3300
11
1 13
9
MM
IC3301<7>
IC3457<10>
SCH
VR3301
9
5
MM
IC3301<7>
SYNC
IC3400<10> IC3453<10>
VR3450
5
1
13
SYNC_SEP MM MM MM
12
4
11 1 9
1
IC3454<10> IC3454<10>
RET_Y
PCST
4 1
5 IC3455<10>
5 7 7
FF S/H AMP
3 1 5
IC3452<10> IC3456<10> TP3450
PLLDC
IC3530<12> FL3530<12>
1
18
14 9
5 LPF
9-11
Y_OFS
IC3601<13>
IC3600<13> FL3600<13>
1
1 5
3 7,8
14
5
LPF Delay ADJ
9-11
PB_CS/INC/UD
PB_OFS
IC3700<14> IC3701<14>
FL3700<14>
1
1 3 5 7,8
14
5 LPF Delay ADJ
9-11
PR_OFS
PR_CS/INC/UD
NENT_L
Q3250,L3253 Q3252,Q3255
C3256<6> Q3257<6>
ADCK
CMPST_Y
13 IC3201<5> 14-16 LPF AMP
Q3260
31
8
Q3261<6>
Y/C SEP.DA
LPF AMP BPF
39
78 71 11
Q3251,L3254 Q3253,Q3254
C3258<6> Q3255<6>
KILL_H
AXO
X3300
IC3302<7>
3 <7>
IC3304<7>
Q3300<7> 10
4
4Fsc
6
APC_DET 5 AMP
VCXO
14
CLAMP S/H
1
3
TP3300
5
TP3301
APC
CCLP
BGP
110 113 134
LINE
146
COMP_SYNC3
11
TBC_WV 14
11
9
RSTH SITE 4
111
5
SCH SITE
IC3820<16>
DEC_CTL FPGA (PLD)
CLAMP_Y
109
CLAMP_C 108
107
106
VC3450 Q3454
DL3450<10>
82,83,
131
27M
187-204 132,133 171 177 178
VCO
CLK27_ORG
TP3824 TP3823 TP3822
AV_BUS
SC HP CF2
PLD_CONF
Y_GAIN
ADCLK_Y ADCLK_Y/PB/PR
IC3534<12> 18,22 13
3
6
AMP
2nd_A/D
24
2
3
10 IC3532<12>
ADCLK_PB
CLAMP
IC3531,
Q3539<12>
PB_GAIN
18,22
13
Q3602-9<13>
AMP 2nd_A/D
24
1
3
12 IC3604<13>
ADCLK_PR
CLAMP
IC3602,
Q3608<13>
PR_GAIN
18,22 13
Q3702-9<14>
AMP 2nd_A/D
24
1
3
IC3704<14>
12
CLAMP
<14>
IC3351<8>
1
12
C DEM LPF
8
1
12
C DEM LPF
8
IC3352<8> Q3353,L3355
C3372<8>
IC3350<8>
9
7
Comparator
Income Burst Flag
145 144 2
IC3871<17>
8 2-17
44-51
OUT_BUFF
1,19
AIN_L
IC3870<17>
19
COMP
SYNC
20
15
CF
21
17
FRM
22
13
MD
179 36-38 157-162
OUT_BUFF
TP3821
EEPROM
CF1
IC3822<16>
11
TBC_WH
8
CLK27
ORG
8
147 KILL_H
8
IC3800<15>
38,39 Y_GAIN
8
41,42 PB_GAIN
44,45 PR_GAIN
1-3
D/A Y_OFS
40
43 PB_OFS
46 PR_OFS
47
AXO
PR_CS/INC/UD 97-99
PB_CS/INC/UD 100-102
NENT_L
152
M2_L 150
Q3352,L3354
C3371<8>
CMPST_PB
CMPST_PR
4fsc PLL
APC_DET
P3001 P3001
19A 19A
21A 21A
3-18
19B 19B
REC_YC(7..0)
21B 21B
19C 19C
20C 20C
P3001 P3002
SYNC_HD 16A 24C
9 14C 24B
VBLK_CSYNC
P3001 P3001
12
INCOM_CLK27 21C 22A
5 INCOM_CF 18A 18A
3 INCOM_FRM 18B 18B
7 INCOM_HD 18C 18C
TP3870
INCF
TP3871
INFRM