Table 6. Post Progress Codes - Intel P4304XXMFEN2 Service Manual

Intel ® Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
BIOS POST Progress Codes
The following table provides a list of all POST progress codes.
Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Checkpoint Upper Nibble
MSB
8h 4h 2h
LED # #7 #6 #5
SEC Phase
01h 0 0 0
02h 0 0 0
03h 0 0 0
04h 0 0 0
05h 0 0 0
06h 0 0 0
07h 0 0 0
08h 0 0 0
09h 0 0 0
0Eh 0 0 0
0Fh 0 0 0
PEI Phase
10h 0 0 0
11h 0 0 0
15h 0 0 0
19h 0 0 0
MRC Process Codes – MRC Progress Code Sequence is executed – See Table 4. MRC Progress Codes
PEI Phase continued...
31h 0 0 1
32h 0 0 1
33h 0 0 1
34h 0 0 1
35h 0 0 1
36h 0 0 1
4Fh 0 1 0
DXE Phase
60h 0 1 1
61h 0 1 1
62h 0 1 1
63h 0 1 1
68h 0 1 1
69h 0 1 1
6Ah 0 1 1
70h 0 1 1
71h 0 1 1
86

Table 6. POST Progress Codes

Lower Nibble
LSB
1h 8h 4h 2h 1h
#4 #3 #2 #1 #0
0 0 0 0 1 First POST code after CPU reset
0 0 0 1 0 Microcode load begin
0 0 0 1 1 CRAM initialization begin
0 0 1 0 0 Pei Cache When Disabled
0 0 1 0 1 SEC Core At Power On Begin.
0 0 1 1 0 Early CPU initialization during Sec Phase.
0 0 1 1 1 Early SB initialization during Sec Phase.
0 1 0 0 0 Early NB initialization during Sec Phase.
0 1 0 0 1 End Of Sec Phase.
0 1 1 1 0 Microcode Not Found.
0 1 1 1 1 Microcode Not Loaded.
1 0 0 0 0 PEI Core
1 0 0 0 1 CPU PEIM
1 0 1 0 1 NB PEIM
1 1 0 0 1 SB PEIM
1 0 0 0 1 Memory Installed
1 0 0 1 0 CPU PEIM (Cpu Init)
1 0 0 1 1 CPU PEIM (Cache Init)
1 0 1 0 0 CPU PEIM (BSP Select)
1 0 1 0 1 CPU PEIM (AP Init)
1 0 1 1 0 CPU PEIM (CPU SMM Init)
0 1 1 1 1 Dxe IPL started
0 0 0 0 0 DXE Core started
0 0 0 0 1 DXE NVRAM Init
0 0 0 1 0 SB RUN Init
0 0 0 1 1 Dxe CPU Init
0 1 0 0 0 DXE PCI Host Bridge Init
0 1 0 0 1 DXE NB Init
0 1 0 1 0 DXE NB SMM Init
1 0 0 0 0 DXE SB Init
1 0 0 0 1 DXE SB SMM Init
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