Table 8. Post Progress Codes - Intel P4304XXMFEN2 Service Manual

Hide thumbs Also See for P4304XXMFEN2:
Table of Contents

Advertisement

Intel
®
Server Chassis P4304XXMFEN2/P4304XXMUXX Product Family System Integration and Service Guide
BIOS POST Progress Codes
The following table provides a list of all POST progress codes.
Diagnostic LED Decoder
1 = LED On, 0 = LED Off
Checkpoint
Upper Nibble
MSB
8h
4h
2h
LED #
#7
#6
#5
SEC Phase
01h
0
0
0
02h
0
0
0
03h
0
0
0
04h
0
0
0
05h
0
0
0
06h
0
0
0
07h
0
0
0
08h
0
0
0
09h
0
0
0
0Eh
0
0
0
0Fh
0
0
0
PEI Phase
10h
0
0
0
11h
0
0
0
15h
0
0
0
19h
0
0
0
MRC Process Codes – MRC Progress Code Sequence is executed – See Table 7. MRC Progress Codes
PEI Phase continued...
31h
0
0
1
32h
0
0
1
33h
0
0
1
34h
0
0
1
35h
0
0
1
36h
0
0
1
4Fh
0
1
0
DXE Phase
60h
0
1
1

Table 8. POST Progress Codes

Lower Nibble
LSB
1h
8h
4h
2h
1h
#4
#3
#2
#1
#0
0
0
0
0
1
First POST code after CPU reset.
0
0
0
1
0
Microcode load begin.
0
0
0
1
1
CRAM initialization begin.
0
0
1
0
0
PEI Cache When Disabled.
0
0
1
0
1
SEC Core At Power On Begin.
0
0
1
1
0
Early CPU initialization during Sec Phase.
0
0
1
1
1
Early SB initialization during Sec Phase.
0
1
0
0
0
Early NB initialization during Sec Phase.
0
1
0
0
1
End Of Sec Phase.
0
1
1
1
0
Microcode Not Found.
0
1
1
1
1
Microcode Not Loaded.
1
0
0
0
0
PEI Core
1
0
0
0
1
CPU PEIM
1
0
1
0
1
NB PEIM
1
1
0
0
1
SB PEIM
1
0
0
0
1
Memory Installed
1
0
0
1
0
CPU PEIM (CPU Init)
1
0
0
1
1
CPU PEIM (Cache Init)
1
0
1
0
0
CPU PEIM (BSP Select)
1
0
1
0
1
CPU PEIM (AP Init)
1
0
1
1
0
CPU PEIM (CPU SMM Init)
0
1
1
1
1
DXE IPL started
0
0
0
0
0
DXE Core started
Description
149

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

P4304xxmuxx

Table of Contents