Mitsubishi MELSEC QS Series User Manual page 250

Hide thumbs Also See for MELSEC QS Series:
Table of Contents

Advertisement

APPENDICES
<<<Fixed buffer No.1 receiving program (Main program)>>>
App
Appendix 7 Dedicated Instructions which can be used in Safety CPU
- 38
Module
(3) BUFRCV instruction
Fig.App.3 shows a program example where buffer memory addresses are replaced
with I/O signals in the program for reading received data from the fixed buffer of the
connection No.1.
TableApp.32 Buffer memory address - I/O signal correspondence
Buffer memory address
in hexadecimal (decimal)
5000
(20480): Open completion signal
H
5002
(20482): Open request signal
H
5005
(20485):
H
Fix buffer receive status signal
When the I/O signals of the Ethernet module are X/Y00 to X/Y1F
M5100
X19
0
Receive
Initial
instruction
normal
completion
signal
M5000
35
Receive
instruction
1PLS
M500
M501
48
BUFRCV
BUFRCV
instruction
instruction
completion
abnormal
device
completion
device
M501
BUFRCV
instruction
abnormal
completion
device
X10: Connection 1 open completion
Y8: Connection 1 open request (This
corresponding signal cannot be used since the
signal does not turn ON/OFF by the OPEN
instruction.)
X10: Connection 1 open completion
X10
X0
M500
Connection
Fixed
BUFRCV
1 open
buffer 1
instruction
completion
open
completion
signal
completion
device
signal
ZP.BUFRCV
Fig.App.3 Program example using I/O signals
I/O signal
"U0"
K1
D5000
Normal completion processing
Abnormal completion processing
PLS
M5000
Receive
instruction
1PLS
D500
M500
BUFRCV
instruction
completion
device

Advertisement

Table of Contents
loading

This manual is also suitable for:

Melsec qs001cpu

Table of Contents