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REGISTER NAME
OUT1 Invert
OUT0_VOD
OUT1_VOD
OUT1_DE
SNLU183 – September 2015
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Table 8. Transmitter Registers (continued)
FIELD REGISTER
BITS
ADDRESS
Reg 0x1F Channel
pfd_sel_inv_out1
7
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
Reg 0x80 Channel
7
drv_0_sel_vod[3]
6
drv_0_sel_vod[2]
5
drv_0_sel_vod[1]
drv_0_sel_vod[0]
4
3
Reserved
2
Reserved
mr_drv_0_ov
1
sm_drv_0_PD
0
Reg 0x84 Channel
7
Reserved
6
drv_1_sel_vod[2]
5
drv_1_sel_vod[1]
drv_1_sel_vod[0]
4
3
Reserved
drv_1_sel_scp
2
mr_drv_1_ov
1
sm_drv_1_PD
0
Reg 0x85
7
Reserved
6
Reserved
5
Reserved
4
Reserved
Copyright © 2015, Texas Instruments Incorporated
DEFAULT
R/RW
0x10
Invert OUT1 Polarity
1: Inverts OUT1 polarity
0
RW
0: OUT1 Normal polarity
0
RW
0
RW
1
RW
0
RW
0
RW
0
RW
0
RW
0x54
OUT0 VOD_PD
0
RW
Controls OUTDriver 0 VOD Setting
0011: Nominal - 10%
1
RW
0100: Nominal - 5%
0
RW
0101: Nominal 800 mV
0110: Nominal + 5%
0111: Nominal + 10%
1
RW
Other Settings - Invalid
0
RW
1
RW
1: Enable 0x80[0] to override pin/sm
control
0
RW
0: Disable 0x80[0] to override pin/sm
control
1: Power down OUT0
0
RW
0: OUT1 in normal operating mode
0x04
OUT1 VOD Control
0
RW
0
RW
OUTDriver1 VOD Setting
000: 570 mVDifferential(Diff) Peak to
0
RW
Peak(PP)
010: 730 mV(Diff PP)
0
RW
100: 900 mV(Diff PP)
110: 1035 mV(Diff PP)
0
RW
1: Enables short circuit protection on
OUT1
1
RW
0: Disable short circuit protection on
OUT1
1: Enable 0x80[0] to override pin/sm
control
0
RW
0: Disable 0x80[0] to override pin/sm
control
1: Power down OUT1 driver
0
RW
0: OUT1 in normal operating mode
0x00
OUT1 DE Control
0
RW
0
RW
0
RW
0
RW
LMH0318 Programming Guide
Register Tables
DESCRIPTION
35
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