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Register Tables
REGISTER NAME
Interrupt Control
22
LMH0318 Programming Guide
Table 5. Global Registers (continued)
FIELD REGISTER
BITS
ADDRESS
Reg 0x56 Channel
7
Reserved
cdr_lock_int_en
6
signal_det1_int_en
5
signal_det0_int_en
4
heo_veo_int_en
3
cdr_lock_loss_int_en
2
signal_det1_loss_int_en
1
signal_det0_loss_int_en
0
Copyright © 2015, Texas Instruments Incorporated
DEFAULT
R/RW
0x00
Interrupt Mask
0
RW
1: Enable Interrupt if CDR lock is
achieved
0
RW
0: Disable interrupt if CDR lock is
achieved
1: Enable interrupt if IN1 Signal
Detect is asserted
0
RW
0: Disable interrupt if IN1 Signal
Detect is asserted
1: Enable interrupt if IN0 Signal
Detect is asserted
0
RW
0: Disable interrupt if IN0 Signal
Detect is asserted
1: Enable interrupt if HEO-VEO
threshold is reached
0
RW
0: Disable interrupt due to HEO-VEO
threshold
1: Enable interrupt if CDR loses lock
0
RW
0: Disable interrupt if CDR loses lock
1: Enable interrupt if there is loss of
signal on IN1
0
RW
0: Disable interrupt if there is loss of
signal on IN1
1: Enable interrupt if there is loss of
signal on IN0
0
RW
0: Disable interrupt if there is loss of
signal on IN0
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DESCRIPTION
SNLU183 – September 2015
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