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Register Tables
REGISTER NAME
Device Version
Channel Control
Reset_Channel_Regs
LOS_status
20
LMH0318 Programming Guide
Table 5. Global Registers (continued)
FIELD REGISTER
BITS
ADDRESS
4
Reserved
3
Test control[3]
2
Test control[2]
1
Test control[1]
0
Test control[0]
Reg 0xF0 Share
7
VERSION[7]
6
VERSION[6]
5
VERSION[5]
4
VERSION[4]
3
VERSION[3]
2
VERSION[2]
1
VERSION[1]
0
VERSION[0]
Reg 0xFF Control
7
Reserved
6
Reserved
los_int_bus_sel
5
4
Reserved
3
Reserved
en_ch_Access
2
1
Reserved
0
Reserved
Reg_0x00 Channel
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
Rst_regs
2
1
Reserved
0
Reserved
Reg_0x01 Channel
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Reserved
LOS1
1
LOS0
0
Copyright © 2015, Texas Instruments Incorporated
DEFAULT
R/RW
0
RW
0
RW
Set to >9 to allow strap observation
on share reg 0x00
0
RW
0
RW
0
RW
0x01
Device Version
0
RW
Device revision
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1
RW
0x00
Enable Channel Control
0
RW
0
RW
1: Selects interrupt onto LOS pin
0
RW
0: Selects signal detect onto LOS pin
0
RW
0
RW
1: Enables access to channel
0
RW
registers
0: Enables access to share registers
0
RW
0
RW
Reset all Channel Registers to
0x00
Default Values
0
0
0
0
0
1: Reset Channel Registers ( self
0
clearing )
0: Normal operation
0
0
0x00
Signal Detect Status
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1: Loss of signal on IN1
0
R
0: Signal present on IN1
1: Loss of signal on IN0
0
R
0: Signal present on IN0
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DESCRIPTION
SNLU183 – September 2015
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