Cpu-To-Pci Memory Post Write Buffer; Cpu-To-Pci Memory Burst Write; Dram Type (Refresh) - AOpen AP43 User Manual

AMI BIOS

CPU-to-PCI Memory Post Write Buffer

Enable this parameter to control the posting of the CPU-to-memory
write data in the posting buffers. Disable the parameter to deactivate
the buffering function.

CPU-to-PCI Memory Burst Write

Enabling this parameter allows the translation of the host cycles into
memory-burst cycles and controls the memory burst-write cycles.
Disabling the function deactivates the memory burst writes.

DRAM Type (Refresh)

This parameter lets you select the DRAM type that you wish to
support. The options are Normal and Low Power. The low-power
Normal
DRAMs are special-type DRAMs. The default setting is .
Motherboard IDE
To take advantage of the IDE features of the motherboard, you need
Enabled
to set this parameter to . Disable the parameter to bypass
the feature.
Primary Master PIO Mode
Auto
If this enhanced IDE parameter is set to , it automatically
detects the PIO mode (mode 0, 1, 2, 3, 4) and sets the interface
timing of the master drive connected to the primary IDE connector. If
you know your HDD PIO mode, you can set this parameter manually.
Auto
The default setting is .
User's Guide
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