FujiFilm FM-DP L Service Manual page 163

INSTALLATION APPENDIX 1 SETTING, CONNECTING, ADJUSTING THE IMAGE I/F BOARD
Adjusting Pixel Offset
If the count start signal (horizontal sync) of the sampling clock is unstable with respect
to the sampling clock, an image with several pixel offsets in the horizontal direction may
be generated. Examples of vertical-grid images acquired are shown below.
A video signal with a pixel clock frequency of 80MHz or higher is acquired with a four-
split sampling scheme (one line is acquired by splitting into four). If any offset occurs in
an image being acquired during four acquisitions, an improper image with every four
pixels offset results.
For example, if a rising edge of the count start signal is located in the middle of the
rising edge of the sampling clock as shown in [A], a normal image is outputted.
However, if the count start signal rises with virtually the same timing as the rising edge
of the sampling clock as shown in [B], the timing of the count start signal becomes
unstable with respect to the sampling clock, so that the count start position is offset for
each line, resulting in pixel offset.
If pixel offset occurs for the reason mentioned above, it can be remedied by delaying
the count start signal.
Sampling clock
[A]
[B]
Adjustment procedure
In order to delay the count start signal (about 6 ns delay), set CN16 to IR.
IR RG
CN16
IR RG
CN16
006-252-01
06.15.99 FM2514
Normal image
Straight lines
With delay in the count start signal of the sampling clock
With no delay in the count start signal of the sampling clock
Pixel offset image
Offset in several pixels
1 line
FM-DP L Service Manual
BA1-30
FP3B0932.EPS
Correct count start
signal timing
Incorrect count start
signal timing
FP3B0933.EPS
BA1-30