Pi - Programming Interface Register - Offset 09H; Figure 8. Enhanced Configuration - Intel 82801EB Programmer's Reference Manual

Serial ata controller
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R

Figure 8. Enhanced Configuration

Note: While the enhanced configuration can support a maximum of six ATA devices, Intel recommends
that its customers limit their platforms to a four-device maximum configuration (applicable to both
compatible and enhanced configuration), as this will provide for an easier transition to a four
SATA device maximum configuration on future ICHs.
4.2.1
PI - Programming Interface Register – Offset 09h
As stated previously, the P-ATA and SATA channels can be configured for either native mode
only or a combination of legacy and native modes. This is controlled via the Programming
Interface register. The programming interface register is found in both the SATA and P-ATA
functions and can be modified by both BIOS (during POST) and operating system software.
Bit
7
6:4
3
2
1
0
SATA Programmer's Reference Manual
S-ATA
Intel
®
ICH5
P-ATA
Type
Reset
RO
1
Indicates the SATA controller supports bus master operation.
RO
0
Reserved
SOP_MODE_CAP: Indicates that the secondary controller supports both
RO
1
legacy and native modes.
SOP_MODE_SEL: Determines the mode that the secondary channel is
operating in.
RW
0
0 = Legacy PCI mode (Default)
1 = Native PCI mode
POP_MODE_CAP: Indicates that the primary controller supports both legacy
RO
1
and native modes.
POP_MODE_SEL: Determines the mode that the primary channel is
operating in.
RW
0
0 = Legacy PCI mode (Default)
1 = Native PCI mode
M
Port 0
Logical Primary
BIOS Selectable
Logical Secondary
M
Port 1
S
M
S
M
Description
Theory of Operation
21

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