Intel 82801EB Programmer's Reference Manual page 32

Theory of Operation
//
// need to perform a read/write modified in order to do this
// properly
// Read the current settings
ReadWriteConfigSpace( pDO, TRUE, &val, 0x92, sizeof( val));
val |= 1;
ReadWriteConfigSpace( pDO, FALSE, &val, 0x92, sizeof( val));
.
.
.
//
// ReadWriteConfigSpace – Read or write PCI config space
//
// Entry:
// pDO
// fRead
// pBuf
// Offset
// Length
// Exit:
// returns NT_SUCCESS if no errors.
//
NTSTATUS
ReadWriteConfigSpace( PDEVICE_OBJECT pDO, BOOLEAN fRead, PVOID pBuf, ULONG Offset,
{
.
.
.
KEVENT event;
PIRP pIrp;
NTSTATUS status;
pIrp = IoAllocateIrp( pDO->StackSize, FALSE);
if( pIrp == NULL)
return STATUS_INSUFFICIENT_RESOURCES;
KeInitializeEvent( &event, NotificationEvent, FALSE);
// The PnP IRPs need the Status field initialized to STATUS_NOT_SUPPORTED.
pIrp->IoStatus.Status = STATUS_NOT_SUPPORTED;
nextStack = IoGetNextIrpStackLocation( pIrp);
nextStack->MajorFunction= IRP_MJ_PNP;
nextStack->MinorFunction= fRead ? IRP_MN_READ_CONFIG : IRP_MN_WRITE_CONFIG;
nextStack->Parameters.ReadWriteConfig.WhichSpace = PCI_WHICHSPACE_CONFIG;
32
// set bit 0 to enable Port 0
ptr to our device object
TRUE if reading, FALSE if writing
ptr to buffer that contains/receives the data
Offset into PCI config space to read/write
size of pBuf
ULONG Length)
SATA Programmer's Reference Manual
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