Compatible Configuration - Option 3 (Combined); Figure 3. Compatible Configuration - Option 3 - Intel 82801EB Programmer's Reference Manual

Serial ata controller
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R
• MAP.MV == '000b'. This indicates that a SATA device on port 0 behaves as a master device
on the logical primary channel and a device on port 1 behaves as a master device on the
logical secondary channel.
The flexibility of the mapping register also allows the following configuration:
• MAP.MV == '001b'. This indicates that a SATA device on port 0 behaves as a master device
on the logical secondary channel and a device on port 1 behaves as a master device on the
logical primary channel.
5.
Shall program the SATA registers appropriately. Because the programming interface is
identical to that of P-ATA, BIOS should follow the same programming guidelines as used for
the P-ATA (the exact details are beyond the scope of this document).
4.1.4

Compatible Configuration - Option 3 (Combined)

This option is selected when at least one SATA device (maximum of two) and at least one P-ATA
device (maximum of two) are connected to both SATA and P-ATA host controllers and are both
accessible by software. This configuration is referred to as the "combined" mode. In combined
mode of operation, devices can be supported in legacy mode, native mode or both. In this mode, it
is expected that the host controller will be programmed for legacy mode of operation. It is
important to note that in this configuration, the SATA and P-ATA host controllers share
functionality but appear as a single PCI function. In this case, the actual P-ATA function is hidden
from system software (i.e., cannot be enumerated or accessed directly) but P-ATA devices
connected to the function (primary channel only) may still be accessed. These devices are accessed
via the standard, P-ATA compatible register set exposed by the SATA controller. Figure 3
illustrates this configuration:

Figure 3. Compatible Configuration - Option 3

Intel® ICH5
SATA Programmer's Reference Manual
Viewed as a
single logical
channel
M
Port 0
S-ATA
S
Port 1
S
P-ATA
M
S
M
Theory of Operation
Logical Primary/Secondary
Channel Assignment
are BIOS Selectable
Physical Primary/Secondary
Channels are Mutually Exclusive
17

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