Intel 82801EB Programmer's Reference Manual page 48

Theory of Operation
//
// P-ATA
// Port 0 == secondary slave
// Port 1 == secondary master
//
OperationRegion(IDEC,PCI_Config,0x90,3)
Field(IDEC,ByteAcc,NoLock,Preserve)
{
MAP, 8, // SATA Map register - Offset 90h
, 8, // Skip 8 bits
PCS, 8
}
Device( IDE1) {
Name(_ADR, 0x01f0002) // Device 31, Function 2
//
// EPRT – Enable the SATA ports. This assumes the controller is in combined
// mode. This would be need to modified to handle non-combined modes.
// Entry:
// arg0
// bit 0 set, enable Port 0
// bit 1 set, enable Port 1
// all other bits must be zero
//
//
// Since the ports operate independently, we can enable both simultaneously
//
Method( EPRT, 1) {
Store( 1, Local0)
Store( Arg0, Local1)
While( LNotEqual( Local0, 0)){
48
or
== primary master/slave
// SATA Port status and control register
// SATA controller
bit map indicating which port(s) to enable:
Or( Arg0, PCS, PCS)
Sleep( 500)
Decrement( Local0)
Store( PCS, Local2)
// Check if we are enabling Port 0
If( LAnd( Arg0, 0x01) {
If( LAnd( Local2, 0x10)) {
Decrement( Local1)
}
Else {
// Set max attempts
// enable Port(s)
// Wait 500ms. Some devices respond
// very quickly, some longer. This loop will
// account for worse case. This is an
// example and could be better optimized
// account for this attempt
// fetch port presence bits
// Port 0 is enabled
SATA Programmer's Reference Manual
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