Example: Defining Heatsink Preload Meeting Board Deflection Limit - Intel Celeron D Thermal Design Manual

775-land lga package for embedded applications
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LGA775 Socket Heatsink Loading
Note: Board and clip creep modify board deflection over time and depend on board stiffness, clip
stiffness, and selected materials.
Note: Designers must define the BOL board deflection that will lead to the correct EOL board deflection.
Figure 15. Example: Defining Heatsink Preload Meeting Board Deflection Limit
A.2.5
Additional Considerations
Intel recommends to design to {d_BOL - d_ref = 0.15mm} at BOL when EOL conditions are not
known or difficult to assess
The following information is given for illustration only. It is based on the reference keep-out,
assuming there is no fixture that changes board stiffness:
d_ref is expected to be 0.18 mm on average, and be as high as 0.22 mm.
As a result, the board should be able to deflect 0.37 mm minimum at BOL.
Additional deflection as high as 0.09 mm may be necessary to account for additional creep effects
impacting the board/clip/fastener assembly. As a result, designs could see as much as 0.50mm total
downward board deflection under the socket.
In addition to board deflection, other elements need to be considered to define the space needed for
the downward board total displacement under load, like the potential interference of through-hole
mount component pin tails of the board with a mechanical fixture on the back of the board.
Intel
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®
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Celeron
D Processor in the 775-Land LGA Package Thermal Design Guide
Order #303730

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