Mitsubishi MELSEC-Q series Programming Manual page 66

Process control instructions
Hide thumbs Also See for MELSEC-Q series:
Table of Contents

Advertisement

S.OUT1
(4) Reset windup
If the manipulated value (MV) exceeds the upper/lower limit value, the following operation is performed to return it to the
upper/lower limit value and enable immediate response when the deviation is inverted.
However, when the integral constant (T1) is 0, the reset windup processing is not performed.
Condition
When T1 > MH,
T
When T1 < ML,
T
(5) Output conversion
In the output conversion, the output value is calculated from the following formula.
NMAX
NMIN
BW
MV
100
(6) Loop stop processing
(a) Setting 1 in SPA of the alarm detection (ALM) selects a loop stop.
A loop stop performs the following processing and terminates the S.OUT1 instruction.
1) BW retains the last value.
2) DMLA, MHA and MLA of the alarm detection (ALM) are turned to 0.
3) MHA2 and MLA2 of the alarm detection 2 (ALM2) are turned to 0.
4) The operation mode (MODE) is changed to MAN.
5) BB1 to BB4 of BB are turned to 0.
(b) Setting 0 in SPA of the alarm detection (ALM) selects a loop run.
A loop run performs "(1) Mode judgment".
(7) Hold processing
Used to specify whether the output value will be held or not by the S.OUT1 instruction at sensor error occurrence
(detected by the S.IN instruction).
A hold processing is performed when the value is determined as RUN at "Loop stop judgement".
Use SM1501 to select whether the manipulated value (MV) will be held or not at sensor alarm occurrence.
• SM1501 = OFF: Manipulated value (MV) will not be held.
• SM1501 = ON: Manipulated value (MV) will be held.
Operation Error
In the following cases, the error flag (SM0) turns ON and the error code is stored in SD0.
Error code
When an operation error occurs
4100
When the values of
non-normalized number
When the values of
4140
non-normalized number
4141
When an operation error occurs
64
Operation expression
T
T
MVP
(MH
T)
1
T
I
I
T
T
MVP
(ML
T)
1
T
I
I
NMIN
Error definition
,
,
are either a non-numeric or
S1
S2
D2
,
,
are either a non-numeric or
S1
S2
D2
T
T
QnPHCPU
––
––
QnPRHCPU
QnUDPVCPU
––
––
––
––

Advertisement

Table of Contents
loading

Table of Contents