Motorola PowerPC 603 Hardware Specifications page 8

Risc microprocessor
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Figure 1 provides the SYSCLK input timing diagram.
SYSCLK
1.4.2.2 Input AC Specifications
Table 7 provides the input AC timing specifications for the 603 as defined in Figure 2 and Figure 3.
Vdd = 3.3 ± 5% V dc, GND = 0 V dc, 0 ≤ T
Num
Characteristic
10a
Address/data/transfer attribute inputs valid to
SYSCLK (input setup)
10b
All other inputs valid to SYSCLK (input setup)
10c
Mode select inputs valid to HRESET (input
setup) (for DRTRY, QACK and TLBISYNC)
11a
SYSCLK to address/data/transfer attribute
inputs invalid (input hold)
11b
SYSCLK to all other inputs invalid (input hold)
11c
HRESET to mode select inputs invalid (input
hold) (for DRTRY, QACK, and TLBISYNC)
Notes:
1. All input specifications are measured from the TTL level (0.8 or 2.0 V) of the signal in question to the 1.4 V of the
rising edge of the input SYSCLK. Both input and output timings are measured at the pin (see Figure 2).
2. Address/data/transfer attribute input signals are composed of the following—A[0–31], AP[0–3], TT[0–4],
TC[0–1], TBST, TSIZ[0–2], GBL, DH[0–31], DL[0–31], DP[0–7].
3. All other input signals are composed of the following—TS, XATS, ABB, DBB, ARTRY, BG, AACK, DBG, DBWO,
TA, DRTRY, TEA, DBDIS, HRESET, SRESET, INT, SMI, MCP, TBEN, QACK, TLBISYNC.
4. The setup and hold time is with respect to the rising edge of HRESET (see Figure 3). This specification is for
configuration-mode only. Also note that HRESET must be held asserted for a minimum of 255 bus clocks after
the PLL-relock time (100 µs) during the power-on reset sequence.
5. t
is the period of the external clock (SYSCLK) in nanoseconds.
sysclk
6. These values are guaranteed by design, and are not tested.
8
1
4
4
VM
VM = Midpoint Voltage (1.4 V)
Figure 1. SYSCLK Input Timing Diagram
Table 7. Input AC Timing Specifications
≤ 105 °C
j
CVih
CVil
66C
66A
Min
Max
Min
Max
4.0
2.5
6.0
4.5
8 *
8 *
t
t
sysclk
sysclk
1.0
1.0
1.0
1.0
0
0
2
3
80C
Unit
Notes
Min
Max
3.5
ns
5.5
ns
8 *
ns
4, 5, 6
t
sysclk
1.0
ns
1.0
ns
0
ns
603 Hardware Specifications
2
3
2
3
4, 6

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