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Standard processing in SVP mode
The following table shows the additional entries required for each of the three main
functions in other input fields:
1 RATE CONTROL
2 ADRS COMP STOP
3 FIRM DUMP
4 HSA DUMP
o: entry required
x: entry not required
RATE CONTROL =>
1
2
ADRS TYPE =>
1
2
ADRS COMP SELECT =>
1
2
3
4
5
6
UNIT ADRS =>
ADRS SET =>
U41161-J-Z126-1-76
Input field
Function
RATE
CONTROL
PROCESS
I-STEP
ABSOLUTE
LOGICAL
ANY
OPERAND FETCH(OFETCH) operand read address
OPERAND(OSTORE)
INSTRUCTION ADRS(IA)
IA & OFETCH
OFETCH & OSTORE
XXXX
XXXXXXXX
UNIT
ADRS
ADRS
TYPE
o
x
x
x
x
o
x
x
Defines program operation
continual program operation
step-by-step command execution
Entry for address compare stop:
entry under ADRS SET is
an absolute address
a logical address
Address compare stop if compare stop address is same as
any address
operands write address
instruction address
instruction and operand read address
operand read and write address
Device address for output of a firmware dump
Compare stop address
Address space larger than 32 bits
32-bit address
User frames and subframes
ADRS
ADRS
COMP
SET
SELECT
x
x
o
o
x
x
x
x
ADRS
COMP
MODE
x
x
o
o
x
x
x
x
63
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