Capacitor Consolidation Rules; Pcb Capacitor Placement And Mounting Techniques; Pcb Bulk Capacitors - Xilinx Spartan-6 FPGA Series Design And Pin Planning Manual

Capacitor Consolidation Rules

Sometimes a number of I/O banks are powered from the same voltage (e.g., 1.8V) and the
recommended guidelines call for multiple bulk capacitors. This is also the case for V
and V
fewer (larger value) bulk capacitors provided the electrical characteristics of the
consolidated capacitors (ESR and ESL) are equal to the electrical characteristics of the
parallel combination of the recommended capacitors.
For most consolidations of V
(ceramic, tantalum, or high-performance electrolytic) with sufficiently low ESL and ESR
are readily available. High-frequency capacitors cannot be consolidated as the usefulness
of high-frequency capacitors depends on the number of PCB vias accessed.
Example
This example is of an FPGA with a single interface spanning three I/O banks, all powered
from the same voltage. The required PCB capacitor table
capacitor per bank. These three capacitors can be consolidated into one capacitor since
three 100 µF capacitors can be covered by one 330 µF capacitor. The following is then true:
•
•
•

PCB Capacitor Placement and Mounting Techniques

Placement and mounting restrictions presented in this section are unique to each capacitor
type listed in the

PCB Bulk Capacitors

Bulk capacitors can be large and difficult to place very close to the FPGA. Fortunately, this
is not a problem because the low-frequency energy covered by bulk capacitors is not as
sensitive to capacitor location. Bulk capacitors can be placed almost anywhere on the PCB,
but the best placement is as close as possible to the FPGA. Capacitor mounting should
follow normal PCB layout practices, tending toward short and wide shapes connecting to
power planes with multiple vias.
Spartan-6 FPGA PCB Design and Pin Planning
UG393 (v1.1) April 29, 2010
in the larger devices. These many smaller capacitors can be consolidated into
CCAUX
CCO
The ESL of the combination must be one-third of the specified capacitor. Three
capacitors at 5 nH are equivalent to one capacitor at 1.7 nH. This implies that a 330 µF
capacitor is acceptable provided its ESL is less than 1.7 nH.
The ESR of the combination must be one-third of the specified capacitor. Three
capacitors each in the range of 10 mΩ to 60 mΩ are equivalent to one capacitor in the
range of 3.3 mΩ to 20 mΩ. A 330 µF capacitor is acceptable provided its ESL is in this
range.
Three 100 µF capacitors with 3 nH ESL and 20 mΩ ESR are replaced by one 330 µF
capacitor with a 0.5 nH ESL and a 15 mΩ ESR.
Capacitor Specifications
www.xilinx.com
, V , and V capacitors, large bulk capacitors
CCINT CCAUX
(Table
section.
PCB Decoupling Capacitors
CCINT
2-1) calls for one 100 µF
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