Interrupt Control Register 2 - National Instruments PCI-DIO-96 User Manual

Appendix B Register-Level Programming — Interrupt Control Register 2

Interrupt Control Register 2

Address:
Type:
Word Size:
Bit Map (PCI-DIO-96/PXI-6508):
7 6
X X
Bit Map (PCI-6503):
7 6
X X
Bit
7–3
2
1–0
1
0
PCI-DIO-96/PXI-6508/PCI-6503 User Manual
Base address + 15 (hex)
Write-only
8-bit
5
X X
5
X X
Name Description
X Reserved.
INTEN Interrupt Enable Bit—If this bit is set, the DIO board
can interrupt the computer. If this bit is cleared, the DIO
board cannot generate interrupts to the computer,
regardless of the status of the bits in Interrupt Control
Register 2.
X Reserved on the PCI-6503.
CTRIRQ Counter Interrupt Enable Bit—If this bit is set, the 82C53
counter outputs can interrupt the computer. If this bit is
cleared, the counter outputs have no effect. To avoid a
spurious interrupt, keep INTEN low when you set
CTRIRQ; that is, set CTRIRQ before setting INTEN.
CTR1 Counter Select Bit—If this bit is set, the output from
counter 1 of the 82C53 is connected to the interrupt request
circuitry. In this mode, counter 0 of the 82C53 acts as a
frequency scaler for counter 1, which generates the
interrupt. If CTR1 is cleared, the output from counter 0 of
the 82C53 is connected to the interrupt request circuitry.
In this mode, counter 0 generates the interrupt. For more
information, refer to the
section for the 82C53 in this appendix.
4 3
X
4 3
X
B-12
2 1
INTEN CTRIRQ
2 1
INTEN X
Interrupt Programming Example
0
CTR1
0
X
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