Appendix C
Register-Level Programming
Interrupt Control Register 1 (PnP Board Only)
D7
D6
x
x
Bit
2–7
1
0
PC-DIO-24/PnP User Manual
D5
D4
x
x
Name
Description
x
Reserved bit.
IRQ1
PPI Interrupt Request for Port B—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
the PPI can send an interrupt, INTRB, to the host
computer. If this bit is cleared, the PPI does not send
the interrupt INTRB to the host computer, regardless
of the setting of INTEN.
IRQ0
PPI Interrupt Request for Port A—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
the PPI can send an interrupt, INTRA, to the host
computer. If this bit is cleared, the PPI does not send
the interrupt INTRA to the host computer, regardless
of the setting of INTEN.
D3
D2
x
x
C-6
D1
D0
IRQ1
IRQ0
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