Register Description For The Interrupt Control Registers; Interrupt Control Register 1 - National Instruments PCI-DIO-96 User Manual

Appendix B Register-Level Programming — Interrupt Control Register 1

Register Description for the Interrupt Control Registers

There are two interrupt control registers on your DIO board. One of these registers has
individual enable bits for the two interrupt lines from each of the 82C55A devices. The other
register has a master interrupt enable bit and two bits for the timed interrupt circuitry. Of the
latter two bits, one bit enables counter interrupts, while the other selects counter 0 or
counter 1. This appendix lists the bit maps and signal definitions.

Interrupt Control Register 1

Address:
Type:
Word Size:
Bit Map (PCI-DIO-96/PXI-6508):
7 6
DIRQ1 DIRQ0
Bit Map (PCI-6503):
7 6
X X
Bit
7–2
7
6
PCI-DIO-96/PXI-6508/PCI-6503 User Manual
Base address + 14 (hex)
Write-only
8-bit
5
CIRQ1 CIRQ0
5
X X
Name Description
X Reserved on the PCI-6503.
DIRQ1 PPI D Port B Interrupt Enable Bit—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI D sends an interrupt, INTRB, to the computer. If this
bit is cleared, PPI D does not send the interrupt INTRB to
the computer, regardless of the setting of INTEN.
DIRQ0 PPI D Port A Interrupt Enable Bit—If this bit and the
INTEN bit in Interrupt Control Register 2 are both set,
PPI D sends an interrupt, INTRA, to the computer. If this
bit is cleared, PPI D does not send the interrupt INTRA to
the computer, regardless of the setting of INTEN.
4 3
BIRQ1
4 3
X
B-10
2 1
BIRQ0 AIRQ1
2 1
X AIRQ1
0
AIRQ0
0
AIRQ0
ni.com