Port C Status-Word Bit Definitions For Input (Ports A And B - National Instruments PCI-DIO-96 User Manual

Appendix B

Port C Status-Word Bit Definitions for Input (Ports A and B)

Address:
Type:
Word Size:
Bit Map:
7 6
I/O I/O
Bit
7–6
5
4
3
2
1
© National Instruments Corporation
Register-Level Programming — Port C Status-Word Bit Definitions for Input (Ports A and B)
Base address + 02 (hex) for PPI A
Base address + 06 (hex) for PPI B
Base address + 0A (hex) for PPI C
Base address + 0E (hex) for PPI D
Read and write
8-bit
5
IBFA INTEA
Name Description
I/O Input/Output—These bits can be used for general-purpose
I/O when port A is in mode 1 input. If these bits are
configured for output, the port C bit set/reset function
must be used to manipulate them.
IBFA Input Buffer Full for Port A—A high setting indicates that
data has been loaded into the input latch for port A.
INTEA Interrupt Enable Bit for Port A—Setting this bit enables
the INTRA flag from port A of the 82C55A. Control
INTEA by setting/resetting PC4.
INTRA Interrupt Request Status for Port A—This status flag,
which operates only when INTEA is high, indicates that
port A has acquired data and is ready to be read. If you
have enabled interrupts (by setting INTEN and the
appropriate bit in Interrupt Control Register 2), this status
flag also indicates that an interrupt request is pending for
port A.
INTEB Interrupt Enable Bit for Port B—Setting this bit enables
the INTRB flag from port B of the 82C55A. Control
INTEB by setting/resetting PC2.
IBFB Input Buffer Full for Port B—A high setting indicates that
data has been loaded into the input latch for port B.
4 3
INTRA
B-21
2 1
INTEB IBFB
PCI-DIO-96/PXI-6508/PCI-6503 User Manual
0
INTRB