Pci Initialization; Table B-3. Common Programming Example Terms - National Instruments PCI-DIO-96 User Manual

Table B-3 contains common terms used in the programming examples.
Term
Port A
Port B
Port C
8255Cnfg
Ctr0
Ctr1
CntrCnfg
IREG1
IREG2
Write (address, data)
Read (address)
CWrite (offset, data)

PCI Initialization

To program at the register level without NI-DAQmx or Traditional NI-DAQ (Legacy), you
must know the PCI-DIO-96 or PXI-6508 base memory address and, if using interrupts, install
an interrupt handler. This manual does not discuss writing an interrupt handler. In order for
the board to operate properly, you must configure the PCI MITE ASIC. NI-DAQmx or
Traditional NI-DAQ (Legacy) usually performs this function, but if you are not using
NI-DAQ, then you must configure the PCI MITE ASIC.
The following sections explain how to configure the PCI MITE ASIC. You must implement
the references made to PCI BIOS
To configure the PCI MITE chip, you must first write an algorithm that finds and stores all
configuration information about the board. To do this, use PCI BIOS calls to search PCI
configuration space for the National Instruments vendor ID (0x1093) and PCI-DIO-96 device
ID (0x0160), PXI-6508 device ID (0x13c0), or PCI-6503 device ID (0x17d0). If a board is
found, the algorithm can store all the board's configuration information into a data structure.
1
To obtain more information on PCI BIOS calls from the PCI SIG, go to www.pcisig.com.
© National Instruments Corporation

Table B-3. Common Programming Example Terms

Address of PPI A Port A Register (Base Address + 0x00)
Address of PPI A Port B Register (Base Address + 0x01)
Address of PPI A Port C Register (Base Address + 0x02)
Address of PPI A Configuration Register (Base Address + 0x03)
Address of 82C53 Counter 0 Register (Base Address + 0x10)
Address of 82C53 Counter 1 Register (Base Address + 0x11)
Address of 82C53 Configuration Register (Base Address + 0x13)
Address of Interrupt Control Register 1 (Base Address + 0x14)
Address of Interrupt Control Register 2 (Base Address + 0x15)
Generic function call for a memory space Write of data to address
Generic function call for a memory space Read from address
PCI configuration space write of data to PCI configuration space offset
1
calls.
B-15
Appendix B Register-Level Programming — Programming
Definition
PCI-DIO-96/PXI-6508/PCI-6503 User Manual