Port C Status-Word Bit Definitions For Bidirectional Data Path (Port A Only - National Instruments PCI-DIO-96 User Manual

Appendix B Register-Level Programming — Port C Status-Word Bit Definitions for Bidirectional Data Path (Port A Only)
Port C Status-Word Bit Definitions for Bidirectional Data Path
(Port A Only)
Address:
Type:
Word Size:
Bit Map:
7 6
OBFA* INTE1
Bit
7
6
5
4
3
2–0
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Base address + 02 (hex) for PPI A
Base address + 06 (hex) for PPI B
Base address + 0A (hex) for PPI C
Base address + 0E (hex) for PPI D
Read and write
8-bit
5
IBFA INTE2
Name Description
OBFA* Output Buffer Full for Port A—A low setting indicates
that the CPU has written data to port A.
INTE1 Interrupt Enable Bit for Port A Output Interrupts—Setting
this bit enables the INTRA flag from port A of the 82C55A
for output. Control this bit by setting/resetting PC6.
IBFA Input Buffer Full for Port A—A high setting indicates that
data has been loaded into the input latch of port A.
INTE2 Interrupt Enable Bit for Port A Input Interrupts—Setting
this bit enables the INTRA flag from port A of the 82C55A
for input. Control this bit by setting/resetting PC4.
INTRA Interrupt Request Status for Port A—This status flag,
which operates only when INTE1 or INTE2 is high,
indicates that port A is ready to be read or written; check
the IBF and OBFA* flags to determine which. If you have
enabled interrupts (by setting INTEN and the appropriate
bit in Interrupt Control Register 2), the INTRA status flag
also indicates that an interrupt request is pending for
port A.
I/O Input/Output—Use these bits for general-purpose I/O lines
if group B is configured for mode 0. If group B is
configured for mode 1, refer to the bit explanations shown
in the preceding mode 1 sections.
4 3
INTRA
B-27
2 1
I/O I/O
PCI-DIO-96/PXI-6508/PCI-6503 User Manual
0
I/O