Sun Microsystems Blade 1500 Service, Diagnostics, And Troubleshooting Manual page 482

H
HBGA
I
2
I
IChip2
IDE
IEEE
IEEE 1394
interleaving
I/O
ISA bus
I-TLB
Glossary-4 Sun Blade 1500 Service, Diagnostics, and Troubleshooting Manual • December 2004
High-density ball grid array. The mechanical connection between a chip and a
printed circuit board.
C Inter-integrated circuits. A chip-to-chip serial bus.
Interrupt concentrator chip.
Integrated drive electronics. An interface for mass storage devices. The
controller is integrated with the disk or CD-ROM drive.
Institute of Electrical and Electronics Engineers, Inc. The organization
establishes standards for some computers and electrical components.
A high-speed communications protocol.
Memory access that alternates between DIMMs and banks based on the lover
order address bits.
DIMM interleaving interleaves between pairs of DIMMS.
Bank interleaving is interleaving within a single device on a DDR1 SDRAM.
Rank interleaving interleaves between a pair of memory devices on a single
DIMM.
XOR Interleaving. Exclusive-OR interleaving. A DIMM interleaving mode that
is used to distribute L2 cache conflict misses and L2 cache read/writeback
pairs across more banks than other interleaving modes. To use XOR
interleaving, all DIMMS must be identical.
Input/output.
The ISA bus is an I/O bus that runs at 8MHz and is used in the PCI-ISA
bridge.
Instruction translation look-aside buffer.