Sun Microsystems Blade 1500 Service, Diagnostics, And Troubleshooting Manual page 434

C.1.1.1 CPU
UltraSPARC IIIi CPU running at 1.5 GHz
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EPIC-7 Cu copper technology
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Integrated L1 caches (data, instruction, prefetch, and write)
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Integrated 1 Mbyte L2 data cache
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System bus — JIO I/O bridge, JBus frequency of up to 200 MHz.
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Integrated DDR-1 memory controller
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Memory — 4 DDR-1 (up to 133/266 MHz) SDRAM DIMMs
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Maximum 8 GB memory supported
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C.1.1.2 I/O Bridge Chip
Sun Microsystems JIO custom I/O bridge ASIC
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JBus
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Dual PCI buses
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C.1.1.3 I/O Subsystem
Acer Labs M1535D+
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PCI to ISA bridge
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Super I/O interface
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UltraDMA 100 controller
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AC97 compliant audio interface
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2
I C interface
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USB 1.1 interface
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C.1.1.4 Gigabit Ethernet
Broadcom BCM5793
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10/100/1000BASE-T Ethernet LAN controller
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3rd-generation technology
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Integrated MAC and PHY
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C-2 Sun Blade 1500 Service, Diagnostics, and Troubleshooting Manual • December 2004
200 MHz bandwidth
128-bit wide MUX address and data bus
PCI V2.2 compliant
64-bit 66 MHz or 32- and 64-bit 33 MHz capable
8 x 64-byte I/O cache each bus
Fully associative I/O memory management unit on each bus
Eight external masters with internal arbiters on each bus