Cpu Port Allocation; Voltage Block Diagram - Icom IC-T70A Service Manual

4-4 CPU PORT ALLOCATION

Pin LINE
No. NAME
[POWER ] input.
1 PWRSW
L=Pushed.
2–5 KS3–KS0
Key matrix.
6–9 KR3–KR0
CPU clock frequency shift.
12 CSHIFT
H=Clock frequency is shifted.
Main power supply line "VCC" control.
15 PCON
H=The transceiver's power is ON.
LED backlight control.
16 LIGHT
L=The backlight is ON.
Charger circuit control.
17 CHGC
H=While charging.
18 VOLCK D/A converter serial clock.
19 VOLDA D/A converter serial data.
PLL unlock detection.
27 UNLOCK
H=The PLL is unlocked.
External [PTT] input.
28 EXTPTT
H=Pushed.
Internal [PTT] input.
37 INTPTT
L=Pushed.
38 ESIO EEPROM serial data.
39 ECK EEPROM serial clock.
40 PLLDATA PLL IC serial data.
41 PLLCK PLL IC serial clock.
42 PLLSTB PLL IC strobe.
PLL IC power saving mode control.
43 PPS
H=Power saving mode.
44 DACLK D/A converter serial clock.
45 DADI D/A converter serial data.
46 DALD D/A converter strobe.
RX power supply line "R5" control.
47 R5C
L=During receive.
TX power supply line "T5" control.
48 T5C
H=During transmit.
49 IOSTB Expander strobe.
Expander chip enable.
50 IOEN
H=Output enable.
Power supply line "PS5" control.
51 PS5C L= The transceiver's power is ON and
in the power saving mode.
MIC line switch (Q7) control.
52 INTMIC
H=Internal MIC is used.
PLL IC loop fi lter switching.
53 PLL SW
L= The PLL lockup time is set to short.

4-5 VOLTAGE BLOCK DIAGRAM

Voltage from the power supply is routed throughout the transceiver via regulators and switches.
UVCO5
VVCO5 PS5
PLL3.6V
UR5
Q300
VCO5V
UR5
REG
CTRL
Q201
Q302
IC304
+3.6 RIPPLE +5
REG
FILTER REG
DESCRIPTION
VR5 R5
Q316
Q317
VR5
CTRL
T5
Q202 Q200
R5 T5
REG
REG
Pin LINE
I/O
No. NAME
54 DETMUTE
I
O
56 TXMUTE
I
O
57 MMUTE
O
58 SQLSW
O 98 CTCSS
O
99 DTMF
O
O
104 VOX
105 BTVIN
I
106 VIN
107 BTSENC Battery type detection.
I
108 RXTEMP
I
109 TXTEMP
I/O
O
110 REMOTE
O
111 RTONE* Weather alert signal decoding input.
O
O
112 CTCIN
O
113 SD
O
114 TXI-V
O
115 AFSTBY
O
116 DIUD2
O
117 NOISE
O 118 DICK2
O
119 BTDET
O
120 DCIN
O
121 DIUD
O 122 DICK
125 KS4
O *; Only for the U.S.A. version transceiver.
BTL5V 5VS
Q5,Q6
+5 +5
Q108-Q110
REG D106 REG
4 - 4
DESCRIPTION
RX AF line switch (IC904) control.
L=AF mute (The quelch is closed).
Transmission mute.
L=TX mute.
MIC mute switch (IC909) control.
L= While DTMF or 1750 Hz tone is
transmitted.
Noise fi lter select.
L= The narrow FM mode is selected.
Outputs CTCSS/DTCS signals.
• During transmit, outputs DTMF/
1750 Hz tone signals.
• During receive, outputs beep sounds
(Square waves)
Microphone input sensing voltage.
Battery voltage.
External power source voltage.
Temperature sensing voltage. (For
Receiving)
Temperature sensing voltage. (For
Transmitting)
E x t e r n a l e q u i p m e n t c o n n e c t i o n
detection.
Tone signals (CTCSS, DTCS, DTMF
and 1750 Hz tone) decoding input.
RSSI voltage from the IF demodulator
IC (IC313).
TX current sensing voltage.
AF power AMP control.
H=AF power AMP (IC1) is activated.
[DIAL] input. (phase A)
Noise level detection.
[DIAL] input. (phase B)
Battery pack attachment detection.
L= The battery pack (BP-264, BP-265)
is attached.
External power source connectinon
detection.
L= An external power source is connected.
[VOL] input. (phase A)
[VOL] input. (phase B)
Key matrix.
Q100
D100,D101
HV
DC
Q101,Q102
VCC SW
D102,D105
CHG
CTRL
CHG
CHGC
BTSENC
BATT
BTSENC
CPU5V
DET
Q101
D108
+5
REG
BTDET
VCC
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
O
I
I
I
I
I
I
I
O
J100
[DC IN]
+
Battery pack
-