Diagnosis; Power On Sequence - Pioneer CDJ-2000NXS Service Manual

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5. DIAGNOSIS

5.1 POWER ON SEQUENCE

A
MAIN CPU
Power on
Pin Y22 of Main CPU
(IC101) cancels reset
at H.
B
Initialization of the Main CPU
Initialization of the SDRAM
Program transfer from
FLASH to SDRAM
Canceling DSP reset
from pin B18 of Main
CPU. Pin G2 of DSP
(IC501) becomes "H".
C
Program transfer to
DSP
Canceling ETH_PHY reset
from pin A18 of Main
CPU. Pin 42 of ETH_PHY
(IC1304) becomes "H".
Register setting of ETH_PHY
D Canceling USB_B reset
from pin A17 of Main
CPU. Pin 46 of USB_B
(IC1101) becomes "H".
Register setting of USB_B
Initialization of the
built-in peripherals
Canceling ATAPI reset
from pin C10 of Main
E CPU. Pin 173 of SODC
(IC7006) becomes "H".
Communication between Main CPU and SRVO
Communication between Main CPU and PNL CPU
Communication between Main CPU and TFT CPU
Canceling reset
F
Apple authentication chip
16
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2
TFT CPU
Pin 13 of TFT CPU
(IC4001) cancels reset
at H.
Initialization of the TFT CPU
Initialization of the SDRAM
Program transfer from
FLASH to SDRAM
Initialization of the
peripheral device
Initialization of the DSP
Display an opening screen
Initialization of the SDRAM
Initialization of the DAC
Built-in peripherals
• USB_A
• ETH_MAC
• SD
• ATAPI
• SERIAL
• SSI
Device select screen
CDJ-2000NXS
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3
PANEL CPU
Power on Power on
Pin 12 of PNL CPU
(IC8003) cancels reset
at H.
Initialization of the PNL CPU
Initialization of the JOG_FL
Initialization of the CDC
LED initial lighting
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4
SRVO
Power on
Pin 45 of SODC
(IC7006) cancels reset
at H.
Initialization of the SODC
Initialization of the
loading mechanism
The insertion of the
disk is possible.
Initialization of the ATAPI
The insertion of the
disk is possible.
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