Pioneer CDJ-2000NXS Service Manual page 19

5
[1] Failure in Startup
[1-1] No power
No. Cause Diagnostics Point
1 The SW power SRVB Assy
does not function
properly.
2 The SW power PNLB Assy
does not function
properly.
3 The EUP control SRVB Assy
unit does not
function properly.
4 Various power SRVB Assy,
supply ICs do MAIN Assy
not function
properly.
[1-2] Indications on the LCD
Check the indications on the LCD.
Nothing is displayed on the LCD. (Black screen)
No. Cause Diagnostics Point
1 Power supply for TFTB Assy
the backlight is
not input properly.
Indications on the LCD are in white screen.
No. Cause Diagnostics Point
1 The TFT CPU TFTB Assy
does not function
properly.
Startup stops with the "Pioneer" logo displayed.
No. Cause Diagnostics Point
1 Communication TFTB Assy,
between the MAIN MAIN Assy
CPU and TFT CPU
could not be
established.
[2] Display (JOG FL/LED)
The JOG FL and the LEDs are controlled by the PANEL CPU (IC8005).
[2-1] The JOG FL does not light.
No. Cause Diagnostics Point
1 Power is not JFLB Assy
supplied properly.
2 Defective JFLB Assy
control signal
3 Defective JOG FL —————
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6
Item to be Checked
Check V+12_EUP.
Check V+3R3_PNL.
Check the EUP_CONT signal.
Check each power-supply IC.
Item to be Checked
Check the connection on the V+12T line and
check the mounting status of the peripheral
parts of the backlight power circuit.
Item to be Checked
Check the power supply and signals
around the TFT CPU.
• V+3R3T_BF, V+1R2_BF
• RESET_TFT
• BUSCLK (Approx. 98 MHz)
Item to be Checked
Check the serial communication cable
connection between the MAIN CPU and
TFT CPU.
Item to be Checked
Check the power-supply voltages (V+3R3,
VFDP2R7_F1, VFDP2R7_F2, and V+27)
of the FL.
Check that the FL control line is properly
connected in the JFLB ASSY.
• J_SCLK
• J_BK
• J_LAT
• J_DSO
If the symptom persists after the above
corrections,
CDJ-2000NXS
6
7
Corrective Action
If V+12_EUP (CN7301 pin_1) is not output, the
SW power is defective. Replace it.
The regulator IC (IC8002) may be loosely connected
with its peripheral devices or a part may be defective.
Correct loose connection. If the symptom persists,
replace the defective part.
If the signal is L, check the output of the SW
power. If V+12 (CN7301 pin_2) is not output,
the SW power is defective. Replace it.
If the signal is H, see [10] EUP Mode.
The regulator IC and its peripheral devices for each
power supply may be loosely connected or a part
may be defective. Correct loose connection.
If the symptom persists, replace the defective part.
Corrective Action
The V+12T line may be loosely connected or the
backlight power circuit may be defective.
Correct loose connection.
If the symptom persists, replace the defective part.
Corrective Action
Diagnose the TFT CPU and its peripherals,
referring to [12-5] E-7023: GUI CPU ERROR.
Corrective Action
Diagnose the TFT CPU and its peripherals,
referring to [12-5] E-7023: GUI CPU ERROR.
Corrective Action
Each power-supply may be loosely connected or
may be defective. Correct loose connection. If the
symptom persists, replace the defective part.
Check the connection and correct loose
connection.
As the JOG FL is controlled by the PANEL CPU,
if no signal is output, check the PANEL CPU.
Replace the JOG FL.
7
8
A
Reference
—————
—————
—————
B
—————
Reference
10.11, 10.12
TFTB ASSY C
Reference
—————
D
Reference
—————
E
Reference
—————
—————
F
—————
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