Pci Local Bus; Pci/Ide Port; Parallel Interface; Parallel Port Addresses - NEC POWERMATE 2000 Service And Reference Manual

Pentium iii 800-mhz or higher processor-based series
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PCI Local Bus

The 32-bit PCI local bus is the primary I/O bus for the system. The PCI bus is a highly
integrated I/O interface that offers the highest performance local bus available for the Pentium
III processor. The bus supports burst modes that send large amounts of data across the bus,
allowing fast displays of high-resolution images.
The high-performance PCI local bus provides a processor-independent data path between the
CPU and high-speed peripherals. The PCI bus is a robust interconnect mechanism designed
specifically to accommodate multiple high performance peripherals for graphics and full motion
video.
The PCI local bus supports memory transfer rates of over 100 MB per second for reads and over
120 MB per second for writes, depending on processor configuration.

PCI/IDE Port

The system board supports a high-performance primary PCI/IDE two-channel port on the
system board. The PCI/IDE port has an enhanced IDE interface that supports a PIO Mode 4
device with 16 MB per second 32-bit wide data transfers on the high-performance PCI local bus.
The port supports Ultra DMA/33/66.
The installed hard drive is connected as a master device on the primary port. The installed CD-
ROM drive is connected as a master device on the secondary port. Each device is connected to a
port with a single signal and power interface cable.

Parallel Interface

The system has a 25-pin bidirectional parallel port on the system board. Port specifications
conform to the IBM-PC standards. The port supports Enhanced Capabilities Port (ECP) and
Enhanced Parallel Port (EPP) modes for devices that require ECP or EPP protocols. The
protocols allow high-speed bi-directional transfer over a parallel port and increase parallel port
functionality by supporting more devices.
The BIOS has automatic ISA printer port sensing that works with most devices. If the BIOS
detects an ISA printer port mapped to the same address, the built-in printer port is disabled.
(Verify in the BIOS Setup that printer ports mapped to the same address are enabled or disabled
appropriately.) The BIOS also sets the first parallel interface port it finds as LPT1 and the
second port it finds as LPT2. The interrupt is set at IRQ7 via the BIOS Setup Utility. Software-
selectable base addresses are 228h, 378h, and 278h.
Sets of I/O addresses for the parallel port are given in the following table (see Section 2,
"System Configuration," for interrupt levels). This is a list of all possible configurations. The
parallel port uses only one set.
Starting I/O Address
378
278
228
378
278
228
Parallel interface signals are output through the system board's 25-pin, D-subconnector. The
connector is located at the back of the system unit.
4-10 System Board

Parallel Port Addresses

Port
LPT1
LPT2
LPT3
LPT1
LPT2
LPT3

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