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Introduction INTRODUCTION About This Document This document is part of a set of reference documents necessary to operate and program CompuLab Fit-PC3. Related Documents For additional information not covered in this manual, please refer to the documents listed in Table 2.
OVERVIEW Highlights Fit-PC3 fan-less, extensible with powerful multimedia capabilities, based on AMD embedded G-Series platform. Block Diagram Figure 1 SBC-FITPC3 Block Diagram 12V DC x86 CPU DDR3 Radeon Memory cores SODIMM x2 64 bit Ctrl. (up to 8GB) Power 6xxx...
Unregulated 10 to 16 volt input AMD G-T44R AMD G-T40N AMD G-T40E AMD G-T56N Power Depends on consumption system load 8W – 17W 7W – 15W 9W – 24W Dimensions 16cm x 16cm x 2.5cm 19cm x 16cm x 4cm Revised December 2011 SBC-FITPC3...
Dedicated hardware (UVD 3) for H.264, VC-1 and MPEG2 decode · HD HQV and SD HQV support: noise removal, detail enhancement, color enhancement, cadence detection, sharpness, and advanced de-interlacing · Super up-conversion for SD to HD resolutions Revised December 2011 SBC-FITPC3...
3.3.2 DisplayPort The Fit-PC3 DisplayPort output is implemented with the APU DisplayPort interface. DisplayPort signals are routed to the display output connector P19. The DisplayPort output supports resolutions of up to 2560 x 1600 at 60Hz. Revised December 2011 SBC-FITPC3...
Wide range (–80dB ~ +42dB) volume control with 1.5dB resolution of analog to analog mixer gain · Software selectable boost gain (+10/+20/+30dB) for analog microphone input · Built-in headphone amplifiers for each re-tasking jack · Integrates high-pass filter to cancel DC offset generated from digital microphone Revised December 2011 SBC-FITPC3...
16/20/24-bit, 44.1k/48k/88.2k/96k/192kHz sample rates. The S/PDIF output signal is routed to audio jack P5. 3.4.3 S/PDIF Input The S/PDIF input is implemented with the ALC888S-VC2 codec. SPDIF-IN converter supports 44.1k/48k/96k/192kHz sample rates. The S/PDIF input signal is routed to audio jack P4. Revised December 2011 SBC-FITPC3...
The SIO1007 Super I/O controller is interfaced with the A55E controller hub LPC port. CIR signals are routed to the IR connector U7. UART signals are routed through the RS232 transceiver to the RS232 connector P2. Revised December 2011 SBC-FITPC3...
The Fit-PC3 power button SW2 controls the system power state. The button serves as a standard ON/OFF button in a typical PC system. The button behavior is programmable using standard tools available in MS Windows and Linux. Revised December 2011 SBC-FITPC3...
USB port 13 negative I/O USB Overcurrent USB_P7_P8_OVC PX1-B16 USB over current for ports 7 and 8 USB_P4_P12_OVC PX1-A26 USB over current for ports 4 and 12 USB_P5_P13_OVC PX1-A47 USB over current for ports 5 and 13 Revised December 2011 SBC-FITPC3...
LPC_LAD2 PX1-A32 Multiplexed command / address / data bit 2 LPC_LAD3 PX1-A33 Multiplexed command / address / data bit 3 LPC_CLK PX1-B23 33MHz clock for LPC device LPC_LFRAME# PX1-B24 LPC bus frame LPC_SER_IRQ PX1-B22 Serial IRQ Revised December 2011 SBC-FITPC3...
RS232_DTR RS232_RTS RS232_DSR RS232_RXD RS232_RI RS232_CTS Table 17 P2 connector data Manufacturer Mfg. P/N Mating connector Wieson G3169-500001 Wieson, P/N: 4306-5000 The connector is compatible with the serial cable adapter (CompuLab P/N 199D10230) supplied by CompuLab. Revised December 2011 SBC-FITPC3...
The Fit-PC3 features two 3.5mm jacks. The analog audio signal pin-outs are compatible with standard 3-pole audio cables. The additional pins (S/PDIF output on P5 and S/PDIF input on P9) are accessible with the 3.5mm-to-RCA adapter cable (CompuLab P/N 199D10300) available from CompuLab.
Signal Name 5V_S0 FCH_LED_PWM IR_RX_FP SATA_ACT# 3V3_S5 6.12 Mini-PCIe sockets (P4, P7) The Fit-PC3 features two standard mini-PCIe sockets – P4 and P7. P4 is a standard full-size mini-PCIe socket. P7 is a standard half-size mini-PCIe socket. Revised December 2011 SBC-FITPC3...
PX1, PX2 connector data Manufacturer Mfg. P/N Mating connector 61082-10260[2|6]LF 61083-10460[2|6]LF 6.15 Power Button (SW2) The Fit-PC3 power button SW2 controls the system power state. For additional details, please refer to section 4.1.3 of this document. Revised December 2011 SBC-FITPC3...
MECHANICAL DRAWINGS The mechanical drawings below are provided for connector location information. Full mechanical drawings are available at http://www.fit-pc.com/. Figure 2 Fit-PC3 mother-board top Figure 3 Fit-PC3 mother-board bottom (x-ray view - as seen from top side) Revised December 2011 SBC-FITPC3...
The fit-PC3 has been designed to allow integration of custom FACE (Function And Connectivity Extension) modules. Please refer to the “FACE module design guide” application note and to the “FACE module design package” available at http://www.fit-pc.com/. Revised December 2011 SBC-FITPC3...
Table 27 DC Electrical Characteristics Parameter Operating Conditions Unit 3.3V Digital I/O 2.475 -0.5 Open drain with internal pull up to 3.3V -0.5 IOL = 3 mA RS232 TX Voltage Swing ±5 ±5.4 RX Voltage Swing ±25 Revised December 2011 SBC-FITPC3...
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