Casio QT-2100 Service Manual page 27

5-6-2. Pin description
PIN NO PIN NAME I / O
1 VDD
2 GD0
3 GD1
4 GD2
5 GD3
6 GD4
7 TVDD
8 TGND
9 GD5
10 GD6
11 GD7
12 GD8
13 GD9
14 TGND
15 GD10
16 GD11
17 GD12
18 GD13
19 GD14
20 TVDD
21 TGND
22 GD15
23 GA0
24 GA1
25 GA2
26 GA3
27 TGND
28 D0
29 D1
30 D2
31 TVDD
32 TGND
33 D3
34 D4
35 D5
36 VDD
37 GND
38 GND
39 D6
40 D7
41 D8
42 TGND
43 D9
44 D10
45 D11
46 TVDD
47 TGND
48 D12
49 D13
50 D14
51 TGND
52 D15
53 INTC2
54 INTC1
55 GCS1
56 GCS2
57 GRD
58 GWE
59 PCIN
60 PCMG
61 CFCE1A
62 CIN
63 CFG
64 CFCE2A
65 ANDO1
66 ANDO2
67 BFO1
68 BFO2
69 BFO3
70 BFO4
71 GND
72 GND
D E S C R I P T I N
VDD VDD
I/O ARC DATA (D0)
I/O ARC DATA (D1)
I/O ARC DATA (D2)
I/O ARC DATA (D3)
I/O ARC DATA (D4)
VDD VDD
GND GND
I/O ARC DATA (D5)
I/O ARC DATA (D6)
I/O ARC DATA (D7)
I/O VDD
I/O VDD
GND GND
I/O VDD
I/O VDD
I/O VDD
I/O VDD
I/O VDD
VDD VDD
GND GND
I/O VDD
O ARC ADDRESS (A0)
O ARC ADDRESS (A1)
O ARC ADDRESS (A2)
O Not used
GND GND
I/O DATA (D0)
I/O DATA (D1)
I/O DATA (D2)
VDD VDD
GND GND
I/O DATA (D3)
I/O DATA (D4)
I/O DATA (D5)
VDD VDD
GND GND
GND GND
I/O DATA (D6)
I/O DATA (D7)
I/O VDD
GND GND
I/O VDD
I/O VDD
I/O VDD
VDD VDD
GND GND
I/O VDD
I/O VDD
I/O VDD
GND GND
I/O VDD
O INT for ARC
O INT for COM
O Chip Select for ARC
O Not used
O Read signal for ARC
O Write signal for ARC
O PCMCIA IN/OUT signal
O Enable for PCMCIA
O Chip Enable1 for CF CARD
O CF CARD IN/OUT signal
O Enable for CF CARD
O Chip Enable2 for CF CARD
O WAIT signal
O CD
O RXD
O CTS
O CI
O DSR
GND GND
GND GND
— 25 —
PIN NO PIN NAME I / O
73 VDD VDD VDD
74 CLKOUT
75 CLKIN
76 GND
77 CS
78 A0
79 A1
80 A2
81 A3
82 A23
83 A20
84 A21
85 A22
86 RD
87 WE
88 INT6
89 INT7 VDD VDD
90 TVDD VDD VDD
91 RESET
92 RD_WE
93 TESTB
94 U1_CTSB
95 U1_DSRB
96 U1_SIN
97 U1_DTRB
98 U1_RTSB
99 U1_SOUT
100 U2_CTSB
101 U2_DSRB
102 U2_SIN
103 U2_DTRB
104 U2_RTSB
105 U2_SOUT
106 U3_CTSB
107 U3_DSRB
108 VDD VDD VDD
109 GND GND GND
110 GND GND GND
111 U3_SIN
112 U3_DTRB
113 U3_RTSB
114 U3_SOUT
115 U4_CTSB
116 U4_DSRB
117 U4_SIN
118 U4_DTRB
119 U4_RTSB
120 U4_SOUT
121 U5_CTSB
122 U5_DSRB
123 U5_SIN
124 U5_DTRB
125 U5_RTSB
126 U5_SOUT
127 TVDD VDD VDD
128 PCMIN
129 CE1B
130 CE2B
131 CFIN
132 CE1A
133 CFCE
134 CE2A
135 BFI1
136 BFI2
137 BFI3
138 BFI4
139 ANDI1
140 ANDI2
141 ANDI3
142 ANDI4
143 GND GND GND
144 GND GND GND
D E S C R I P T I N
O CLOCK 8MHz
I CLOCK 8MHz
I GND
I Chip Enable 1
I ADDRESS (A1)
I ADDRESS (A2)
I ADDRESS (A3)
I GND
I ADDRESS (A23)
I ADDRESS (A20)
I ADDRESS (A21)
I ADDRESS (A22)
I IO READ
I IO WRITE
I INT for ARC
I RESET
I READ/WRITE signal
I VDD
I CST2
I DSR2
I RXD2
O DTR2
O RTS2
O TXD2
I CTS3
I DSR3
I RXD3
O DTR3
O RTS3
O TXD3
I CTS4
I DSR4
I RXD4
O DTR4
O RTS4
O TXD4
I CTS5
I DSR5
I RXD5
O DTR5
O RTS5
O TXD5
I CTS6
I DSR6
I RXD6
O DTR6
O RTS6
O TXD6
I PCMCD1
I CE1
I CE2
I CFCD1
I CE1
I ADDRESS (A23)
I CE2
I RXD1
I CTS1
I CI1
I DSR1
I WAIT for CF CARD
I WAIT for PCMCIA
I CD1
I CD1