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Yamaha AVR-S80 Service Manual page 57

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A
B
AVR-S80 SCHEMATIC DIAGRAM (SUB)
1
4.0
0
4.9
2
3
SUB (4)
Page 55
B4
to MAIN (1)
SUB (1)
4
5
~
5.1
~
~
5.1
~
~
~
~
~
~
FL DRIVER
~
~
-30.0
-30.0
~
6
~
~
~
~
~
~
7
8
9
C
D
E
IC300: NJM2595D
IC301: LC72722
Video Switch
RDS Decoder
V+
SW2
SW1
SW5
16
10
14
2
1
Vin1
VDDA
13
3
REFERENCE
VOLTAGE
S1
S5
Vin2
9
VSSA
4
20k
6dB
75ohm
1
Vout1
20k
57kHz
S2
ANTIALIASING
Vin3
7
MPX IN
2
bpf
FILTER
(SCF)
20k
S6
DO
20
Vin4
5
20k
S3
6dB
75ohm
15
Vout2
CL
21
RAM
20k
DI
22
CCB
(24 BLOCK DATA)
Vin5
3
CE
23
20k
T1
7
MEMORY
S7
CONTROL
T2
8
TEST
Vout3
6dB
75ohm
11
T3
9
20k
T4
10
4
6
12
9
11 16 17
SW3
SW4
GND
V-
REMOTE
Point 4 Pin 13 of IC301
SENSOR
SUB (2)
5.1
~
~
5.1
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
FL DISPLAY
F
G
IC400: LC75712E FLD
FL Display Driver
5
6
CG
CLOCK
DI
64
+
PLL
14
VDDD
ROM
RECOVERY
(57kHz)
(1187.5Hz)
DC
CL
63
SHIFT REGISTER
15
VSSD
VREF
RAM
SMOOTHING
DATA
CE
62
CG
19
RDS-ID
FILTER
DECODER
RAM
18
SYNC
ERROR CORRECTION
SYNC/EC
ADDRESS
ADDRESS
AD
(SOFT DECISION)
CONTROLLER
24
SYR
VDD
60
REGISTER
COUNTER
RAM
CLK(4.332MHz)
VSS
57
BLINKCYCLE
BLINK
SYNC
SYNC
REGISTER
GENERATOR
DETECT-1
DETECT-2
OSC/DIVIDER
VFL
55
DISPLAY
DISPLAY
REGISTER
CONTROL
RES
61
13
12
DUTYCYCLE
DUTY
REGISTER
GENERATOR
TEST
56
GRID
GRID
REGISTER
CONTROL
INSTRUCTION
CONTROL
DECODER
OSCI
59
TIMING
OSC
DIVIDER
OSCO
GENERATOR
58
SUB (3)
VIDEO SW
# All voltages are measured with a 10MΩ/V DC electric volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
H
I
1
AM1
AM2
2
35
AM35
36
AA1
37
AA2
38
AA3
AA4/G16
39
40
AA5/G15
41
AA6/G14
42
AA7/G13
AA8/G12
43
44
G11
45
G10
53
G2
54
G1
x: NOT USED
O: USED / APPLICABLE
5.0
11.8
5.7
5.7
10.7
5.7
2.5
2.5
5.1
4.9
0
2.5
2.5
0
0
2.6
J
K
L
AVR-S80/NX-SW80
EUROPEAN
0
0
0
0
0.1
0
5.0
2.4
4
57

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