DFI PT880-ALE User Manual page 62

System board
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3
BIOS Setup
3.1.3.3 CPU & PCI Bus Control
Move the cursor to this field and press <Enter>. The following
screen will appear.
The settings on the screen are for reference only. Your version may not be identical
to this one.
PCI Master 0 WS Write
When enabled, writes to the PCI bus are executed with zero
wait state.
PCI Delay Transaction
When enabled, this function frees up the PCI bus for other PCI
masters during the PCI-to-ISA transactions. This allows PCI and
ISA buses to be used more efficiently and prevents degradation
of performance on the PCI bus when ISA accesses are made.
VLink Mode Selection
This field is used to select the VLink mode. If you selected "By
Auto", you can enable the VLink 8x function in the field below.
VLink 8X Support
When this field is set to Enabled, the speed of VLink which links
the North Bridge and South Bridge will be 8x.
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