Page 1
SERVICE MANUAL DIGITAL TRANSCEIVER S-14120IZ-C1 May. 2005...
Page 2
8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver. Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United Kingdom, Germany, France, Spain, Russia and/or other countries.
Page 4
SECTION 1 SPECIFICATIONS ■ GENERAL • Frequency coverage : 1240.000–1300.000 MHz • Type of emission : FM, GMSK (Digital) • Transmission speed (theoretical value) : Data 128 kbps Digital voice 4.8 kbps • Codec : AMBE (2.4 kbps) • Number of memory channel : 105 (incl.
Page 5
SECTION 2 INSIDE VIEWS • MAIN UNIT Top view APC amplifier* (IC1250: TA75501F) RF amplifier (Q1: NE34018) 1st VCO circuit Power amplifier* (IC1160: RA18H1213G1) AF power amplifier (IC1551: LA4425) PLL reference Demodulator IC oscillator [DV mode], [FM mode] (X400: CR662) (IC191: TA33136) 2nd VCO circuit MSK receiver IC...
Page 6
SECTION 3 DISASSEMBLY INSTRUCTIONS 2 Unsolder 11 points C. 3-1 ID-1 3 Unscrew 2 screws D, and remove the ANT connector E. • REMOVING THE LOGIC-1 UNIT 4 Take off the cable F from the chassis. 1 Unscrew 1 screw A, and remove the cover B.
SECTION 4 CIRCUIT DESCRIPTION 4-1 RECEIVER CIRCUITS The RF signals from the bandpass filter (FI2) are mixed with the 1st LO signal, where come from the 1st VCO cir- 4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT) cuit, at the 1st mixer circuit (IC71) to produce a 243.95 The antenna switching circuit functions as a low-pass filter MHz 1st IF signal.
Page 8
4-1-5 DEMODULATOR CIRCUITS (MAIN UNIT) The demodulated data signals from the MSK receiver IC (IC271, pin 13) are amplified at IC343 (pins 1, 2) and then • DV MODE applied to the mode switch (IC342, pins 1, 6). The demodulator IC (IC191) contains the 3rd mixer, limiter amplifier, quadrature detector, active filter and noise ampli- The switched signals from the mode switch (IC342, pin 1) fier, etc.
Page 9
signals are applied to the CPU (IC50) via the FPGA IC 4-1-8 SQUELCH CIRCUITS (MAIN UNIT) (IC200). • DIGITAL CODE/CALL SIGN SQUELCH (DV MODE ONLY) The digital code/call sign squelch circuit detects matched • DV MODE (VOICE OPERATION) digital code/call sign and opens the squelch only when The digital audio signals from the CPU (IC50) are applied receiving a signal containing a matching digital code/call to the AMBE CODEC IC (IC2) for code expansion, and are...
"DAMOD" signal. The converted digital audio signals are applied to the AMBE CODEC IC (IC2) for code com- While connecting the microphone to ID-1, the AF signals pression and are then applied to the CPU (IC50). from the microphone (J1600, pin 6) are applied to the micro-...
and then mixed with the amplified I/Q baseband signals. The The power amplifi ed signal from the power amplifi er (IC1160, modulated signal is output from pin 14. pin 4) is passed through the antenna switch (D1160), SWR detector circuit (D1166, D1170), low-pass fi lter which The modulated signal (IC890, pin 14) is passed through the contains strip-line and C1198, and then applied to the bandpass (FI880) and low-pass (L892, L893, C904–C908)
signal from the 1st VCO (Q471, Q472, D471) is applied to 4-4 POWER SUPPLY CIRCUITS the buffer amplifi ers (Q473, Q474) and is then applied to the 4-4-1 LOGIC-1 UNIT VOLTAGE LINE PLL IC (IC400, pin 6). Line Description The PLL IC contains a prescaler, programmable counter, Common 5 V controlled by the +5 V regula- programmable divider and phase detector, etc.
4-5 PORT ALLOCATIONS 4-5-1 CPU (LOGIC-1 UNIT; IC50) Port Port Description Description number name number name Outputs control signal to the TX power Input port for up/down signal from the PCON MU/D controller (MAIN unit; Q1250). connected microphone. Input port for the PLL unlock signal. Input port for the noise signal from the ULCK NOIS...
SECTION 5 ADJUSMENT PROCEDURESE 5-1 PREPARATION When adjusting ID-1, ADJUSTMENT SOFTWARE, JIG CABLE (see illustration on page 5-2) and OPC-1127 are re- USB CABLE quired. ▄ REQUIRED TEST EQUIPMENT EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE Output voltage : 13.8 V DC Frequency range : 300–3000 Hz...
Page 15
• CONNECTION DC power supply Modulation Attenuator 13.8 V, 10 A or more analyzer 50 dB or 60 dB RF power meter 50 Ω, 20 W Standard signal generator 0.1–1500 MHz –127 to –17 dBm (0.1 µV to 32 mV) Coution DO NOT transmit while an SSG is...
5-2 PLL AND CODEC ADJUSTMENT MEASUREMENT ADJUSTMENT ADJUSTMENT ADJUSTMENT CONDITION VALUE UNIT LOCATION UNIT ADJUST FPGA 1 • Operating freq. : 1240.00 MHz LOGIC-1 Connect a frequency 16.3840 MHz LOGIC-1 C202 FREQUENCY • Mode : DD mode unit counter to the check unit [ Set FPGA •...
Page 17
• MAIN AND LOGIC-1 UNITS PLL lock voltage check point C202 FPGA frequency adjustment C215 CP200 PLL lock voltage FPGA frequency check point check point CP.I CP.IR I/Q balance check point CP.Q CP.QR 5 - 4...
CURRENT mum counterclockwise. panel between the DC power from the pre- unit [ FPGA D.C. • Preset "IQ Direct-current output" supply and ID-1. set position. voltage ad- justment • Operating freq. : 1300.00 MHz 100 mA higher MAIN R1086 /DV I ] •...
Page 19
• MAIN AND LOGIC-1 UNITS R1251 TX power adjustment R1087 R1086 YGR current adjustment YGR carrent adjustmentent CP30 FM carrier check point CP207 CP207 DSP input level check point R1704 FM deviation adjustment R1707 DSP input level adjustment 5 - 6...
Need help?
Do you have a question about the ID-1 and is the answer not in the manual?
Questions and answers