Cpu (Logic Unit); Port Allocations; Logic Unit; Ic1 - Icom IC-718 Service Manual Addendum

4-4-3 CPU (LOGIC UNIT)

The CPU (IC1) contains an 8-bit CMOS CPU, a 60 k-byte
ROM, a 2 k-byte RAM. A 9.8304 MHz clock is used for rapid
operation. The CPU controls the operating frequency, mode,
function display, etc. The memory channel information is
stored in the EEPROM (IC2).
The Icom CI-V network system allows the IC-718 to be
remotely controlled by a personal computer using an RS-
232C I/O port.
• PORT ALLOCATIONS (LOGIC unit; IC1)
Pin Port
number name
1 AVXL Input port for the anti-VOX voltage.
CON0– Output control bit signals for the 1st
15–17
CON2 LO DDS circuit (PLL unit; IC6).
Output reset signal for the DDS cir-
cuits (PLL unit; IC2, IC6) and D/A con-
18 DRES
verters (MAIN unit; IC3001, IC3004,
IC3006), etc.
Outputs serial clock signal for the DDS
19 PCK
circuits (PLL unit; IC2, IC6).
Outputs serial data signals for the
21 PDAT
DDS circuits (PLL unit; IC2, IC6).
Outputs strobe signals for the 1st LO
22 DSTB
DDS circuit (PLL unit; IC6).
Outputs strobe signals for the BFO
23 PSTB
DDS circuit (PLL unit; IC2).
Outputs strobe signals for the D/A con-
24 BSTB
verter (MAIN unit; IC3001).
Outputs strobe signals for the D/A con-
25 FSTB
verter (MAIN unit; IC3004).
Outputs strobe signals for the D/A con-
26 MSTB
verter (MAIN unit; IC3006).
P55, Output LCD backlight control signals
41, 42
P56 for the dimmer circuit (Q70–Q72).
Outputs squelch mute control signal,
applied to the AF selector switch
43 SQLS
(MAIN unit; IC2102).
High : Squelch opens
Outputs serial clock signal for the I/O
expander (MAIN unit; IC3301) and D/A
MCK
54
converters
IC3004, IC3006).
Outputs serial data signals for the I/O
expander (IC3301) and D/A converters
55 MDAT
(IC3001, IC3004, IC3006) on the
MAIN unit.
Outputs start signal for the optional
57 STAT
antenna tunner.
Input port for transmit control signal
58 KEY
from the optional antenna tunner CPU.
Outputs chip select signal for EEP-
60 ECS
ROM (IC2).
Input port for serial signal from EEP-
61 ESI
ROM (IC2).
Description
(MAIN unit; IC3001,

LOGIC unit; IC1

Pin Port
number name
62 ESO
63 ESCK
SBSY,
64,
65 SPST
66, DSPS,
67, DINT,
68 DSST
70 DASK
71 DOTK
77 POWS
79 BEEP
80 RXS
81 TXS
82 PWRK
85 ASTB
86 P41
87 P42
88 SEND
AFGL
90
91 RFGL
92 RITL
93 SFTL
95 UD
FORL
96
97 REFL
98 SML
ALML
99
VOXL
100
4 - 7
Description
Outputs serial signal to EEPROM
(IC2).
Outputs serial clock signal to EEP-
ROM (IC2).
Output control signals for the optional
UT-102 (
VOICE SYNTHESYZER UNIT
Output control signals for the optional
UT-106 (DSP UNIT ).
Input port for [KEY] jack, dash signal.
Low : During key down.
Input port for [KEY] jack, dot signal.
Low : During key down.
Outputs switching relay (PA unit; RL1)
control signal.
Outputs beep/CW side tone signals.
Outputs R8V regurator (MAIN unit;
IC3005) control signal.
Low : While receiving.
Outputs T8V regurator (MAIN unit;
IC3005) T13V regurator (MAIN unit;
Q3801, Q3802) control signal.
Low : While transmitting.
Input port for the [POWER] switch.
Low : While [POWER] is pushed.
Outputs strobe signals for the I/O
expander (MAIN unit; IC3301).
Input port for the CI-V control signals.
Outputs CI-V control signals.
Input port for connected microphone's
PTT switch and SEND signal from the
[ACC] jack.
Low : While the PTT is pushed or
activated from an external
unit.
A/D input port for the [AF] control.
A/D input port for the [RF/SQL] control.
A/D input port for the [RIT] control.
A/D input port for the [SHIFT] control.
A/D input port for the microphone
up/down signal.
A/D input port for the SWR detector
circuit (FILTER unit; D2).
A/D input port for the SWR detector
circuit (FILTER unit; D3).
A/D input port for the S-meter amplifier
circuit (MAIN unit; IC1701d).
A/D input port for the ALC meter ampli-
fier circuit (MAIN unit; IC1751a).
A/D input port for the VOX voltage.
).