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LPC connector
The Low Pin Count Interface was defined by Intel
sition towards legacy free systems. It allows the integration of low-bandwidth legacy I/O com-
ponents within the system, which are typically provided by a Super I/O controller. Furthermore,
it can be used to interface firmware hubs, Trusted Platform Module (TPM) devices and embed-
ded controller solutions. Data transfer on the LPC bus is implemented over a 4 bit serialized
data interface, which uses a 33MHz LPC bus clock. For more information about LPC bus refer
to the Intel
Low Pin Count Interface Specification Revision 1.1'.
®
Chapter 2 Hardware Installation
Chapter 2
LAD0
LAD1
VCC3
GND
LAD2
2
10
1
9
CLK
RST#
LAD3
FRAME#
®
Corporation to facilitate the industry's tran-
SD/MMC Slot
This expansion port is used to insert a Secure Digital Input/Output (SDIO) or Multimedia Card
(MMC) device. Aside from storing data files, an SDIO card is also capable of storing powerful
software applications.
28
SD/MMC Slot
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