Peripheral Chip Selects - Honeywell bendis king KLN 94 Maintenance Manual

BENDIX/KING
This limits the sinking current of Q5013-B to approximately 350mA. When pin 15 of U5013 is low,
Q5013-B will be turned off.
4.3.4.2.23 DUART and RS-232 Interface
DUART U5042 provides two asynchronous receiver-transmitters. It is used for serial communica-
tion between the Host microprocessor and the GPS PXpress Card Receiver. It is also used for
communication between the Host microprocessor and the data loader RS-232. The communica-
tion baud rate is derived from a 3.6864MHz clock oscillator (Y5004). DBTX_INTn interrupts the
Host microprocessor when U5042 is ready to transmit data to the data loader RS-232. When re-
ceiving data from the data loader RS-232, DBRX_INTn interrupts the Host microprocessor.
In addition, U5042 is used to read external discrete input signals. U5044 is a discrete input level
converter. U5044 is always enabled and has internal protection for lightning. GLUINTn will inter-
rupt the Host microprocessor if there is a level transition in either one of the pins from IP0 through
IP3, if data is received from the GPS PXpress Receiver Card, or if U5042 is ready to transmit data
to the GPS PXpress Receiver Card.
U5027 and U5026 are level translators that convert RS-232 data from a 5V level to an EIA-232
standard level and vice-versa. Capacitors on the input and output lines are used for EMI suppres-
sion.
4.3.4.2.24 GPS Displayed Discrete input.
The GPS_DISPLAYED input pin is EMI suppressed by C5212; level shifted by CR5020, R5129,
R5128, and R5127; and passed on to U5042 to be monitored by the Host microprocessor.
4.3.4.2.25 Serial Peripheral Interface
The front panel knobs and buttons, real time clock, discrete inputs, and discrete outputs are inter-
faced to the Host microprocessor via a serial peripheral interface. U5028 is the serial bus address
decoder. The chip select truth table is shown below.
ADDRESS
PCS_CS PCS 2 PCS 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
4.3.4.2.26 Altitude Audio Alert Driver
U5041 divides the 32MHz clock down to a 1kHz square wave oscillator. Q5023 buffers the
AUDIO_TONE signal. Digital Pot U5045-C controls the amplitude of the signal applied to buffer
U5043-A. The signal is then a/c coupled, scaled, and partially filtered by buffer U5043-B and as-
sociated components.
4.3.4.2.27 Lighting Bus Monitor.
Page 4-38
PCS 0
0 0 Chip select for discrete inputs.
0 1 Chip select for discrete outputs.
1 0 Spare
1 1 Chip Select for Digital Pot.
0 0 Spare
0 1 Chip Select for Front Panel Switches.
1 0 Spare
1 1 Spare
TABLE 4-8 PERIPHERAL CHIP SELECTS
15599M00.JA
DESCRIPTION
Rev 0, Sept/2000
KLN 94