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Name
KBBUSCON;
Partno
EV80C196KB;
Revision
01; Date
l/18/89;
Designer
Doug Yoder;
Company
Intel ECO;
Assembly
80C196KB evaluation board;
Location
u12;
Device
22VlO;
/*******************x*******************~*~~~~~~~~~~~*~*~~~~~~~~~~~~~,
/* Generates mapping signals for the target processor on the
*/
/* 80C196KB evaluation board.
*/
/*******************x*******************~~**~*~~~~~~~***~~~~~***~~~*~,
/* Allowable Target Device Types:
22VlO
*/
/***************************************~******~*******************~
/** Inputs **/
PIN 1 = CLOCKOUT;
/* MCS96 system CLOCKOUT
*/
PIN 2 = STALE;
/* STreched MCS96 Address Latch Enable */
PIN 3 = !HLDA;
PIN [4..11]=[a8..a15];
PIN 13 = !RESET;
/* 80C196KB HOLD Acknowledge
/* MCS96 latched A8 - Al5
/* MCS96 RESET pin
/** outputs **/
PIN 14 = !CS510;
PIN 15 = !CE2;
PIN 16 = !BUSWIDTH;
PIN 17 = state bit 0;
PIN 18 = state-bitll;
PIN 19 = !WAITT
PIN 20 = state bit-2;
=IN 21 = !CEO;-
'IN
22 = !CEl;
PIN 23 = MAP;
/* OV=> enable uart, U20
/* OV=> enable U14 memory
/* OV=> put processor in 8 bit mode
/* wait-state counter bit 0
/* wait-state counter bit 1
/* OV=> hold MCS96 in wait-state
/* wait-state counter bit 2
/* OV=> enable Ul and U8 memory
/* OV=> enable U6 and U13 memory
/* 5V=> map ram as romsim
l
* Declarations and Intermediate Variable Definitions
**/
FIELD
memaddr = [a15..8];
eprom
= (!MAP & memaddr:[2000..27FF])
#
memaddr:[O ..FF] # memaddr:[lDOO..lDFF];
ram
=
(MAP & memaddr:[2000..27FF])
# memaddr:[2800..5FFF];
eeprom =
memaddr:[6000..7FFF];
uart
=
memaddr:[lEOO..lEFF];
*/
*/
"1
*/
*/
*/
*/
*/
*/
*/
*/
*/
*/
open0
=
memaddr:[lOO.. lCFF] # memaddr:[COOO..FFFF];
open1
=
memaddr:[8000..BFFF];
bw
=
eeprom # uart;
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