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Intel EV80Cl96KB User Manual page 60

Microcontroller evaluation board

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MCS-96
MACRO
ASSEMBLER
EV96
DOS
3.20
(038-N)
MCS-96
MACRO
ASSEMBLER,
i/l 2
SOURCE
FILE:
96KBRISM.A96
OBJECT
FILE:
96KBRISM.OBJ
CONTROLS
SPECIFIED
IN INVOCATION
COMMAND:
DEBUG
01/24/89
13:55:41
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SOURCE
STATEMENT
EV96
module
main
;
================
:
; This
file contains
a RISM
designed
to operate
the EV80C196KB
evaluation
; board.
It includes
the
required
RISM
features
and the optional
diagnostic
; mode.
The board
also
supports
remapping
the memory
space
after
reset.
i This
allows
the RISM
code
to gain
control
on reset
and,
after
the
; initialization
routines
are complete,
remap
memory
so that
user
code
; can be loaded
into RAM at the reset
location
(2080H).
;
i The serial
link
is provided
by an external
UART
(82510)
with
the received
; data
interrupt
tied
to the NM1
(Non Maskable
Interrupt)
of the processor.
i The
use
of the NM1
for this
purpose
allows
the user
to maintain
control
; of the system
even
if the running
program
locks
out
the
interrupts
or
; modifies
the mask
register.
;
; In addition
to the NM1
and
its
vector,
this
RISM
uses
the
following
; resources:
;
,
Two words
in the
system
stack
i
;
The TRAP
instruction
and its vector
;
;
External
memory
partitions
(OOOOH-OOFFH),
;
(lDOOH-lEFFH),
and
;
(2014H-202FH)
i
;
( Note
that
all of these
partitions,
(except
lDOOH-1EFFH
and
;
2018H),
are
reserved
by the MCS-96
architecture.
)
;
i
Nine
bytes
of registers
in the partition
(30H-38H).
The
i
user
must
ensure
that
no registers
in this
partition
are used
;
by
code
which
is to operate
with
the RISM.
The easiest
way of
;
doing
this
is to generate
an ASM-96(tm)
module
which
declares
an
;
RSEG
at 30H which
is nine
bytes
long.
This module
can then
be
;
linked
into the
final
program
to prevent
the
linker
from assigning
i
these
registers
to some
other
module.
i
ieject

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