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EV80C196KB Microcontroller Evaluation Board User's Manual -1 I-
See appendix B and appendix C for details on reserved areas of memory.
Bank
No.
Even
Bytes
Odd
Bytes
Enable
Signal
Memory
Type
I.C.
I.C.
0
U8
Ul
CEO
8K x 16-bit Monitor EPROM
from 0-FFH and 1 DOO-1 DFFH
1
u13
U6
CEi
8K x 16-bit ROMsim/RAM
from 2000H-5FFFH
2
u14
u14
CE2
8K x 8-bit ROMsim/RAM
from 6000H-7FFFH
Host Interface
,
The PC host interface is accomplished with the 82510 UART (U20) connected to Pl
via RS-232 drivers. The UART resides in the address range 1 EOOH - 1 EFFH.
Therefore, register 0 in the UART would be at address 1 EOOH of the 8OC196KB,
reg. 1 would be at 1 EOl H, reg. 2 would be at 1 E02H, etc. up to reg. 7 at 1 E07H.
The registers will repeat again with reg. 0 at 1 E08H due to the limited decoding
granularity of the EPLD. Pin 12 of the UART, OUTl#, is used to tell the PC host
when the 80C196KB is executing user code by a true level on the Ring Indicator
input of the host serial
port.
Digital I/O
With the exception of the NMI input, which is used by the Host Interface, all Digital I/
0 functions of the 8OC196KB are available to you. There are eight LEDs on-board
along with buffer/drivers which allow you to quickly observe the state of Port 1,
HSO.0 and Port 2.5/PWM (see figure 4 or the schematics in appendix A for loca-
tion). The TxD and RxD pins of the 80C196KB (Port 2.0 and Port 2.1) are con-
nected to RS-232 buffer/drivers, which are connected to P2. All of the I/O signals
are available on JP2 (see figure 8 or the schematics in appendix A for pinout).
Note: because RxD is connected to an RS-232 receiver (U19 pin 3) any attempt
to use it as a digital input will result in a contention. If you would like to use it
as a digital input, remove jumper shunt El9 to disconnect the receiver.
Analog Inputs
The Port 0 inputs of the 80C196KB double as both digital and analog inputs. The
EV80C196KB board includes circuitry to make the analog inputs easier to use. A
precision voltage source for Vref is provided on board (U3 and U4) which can be
carefully adjusted by trimming RPl . Also, jumper shunt E4 allows Vref to be con-
nected to Vcc instead of the output of U3. By removing E4 entirely, an off board
reference can be connected to JPl . By removing jumper shunt E2, ANGND can be
isolated from Vss. Protective clamping diodes are installed on each channel. RC
networks are provided in sockets (to ailow you to change the input impedance to
match your application) on all of the analog input channels. If Port 0 is to be used
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