Intel EMB-H61A Manual
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Intel EMB-H61A Manual

Intel EMB-H61A Manual

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I n d u s t r i a l M o t h e r b o a r d
E M B - H 6 1 A
EMB-H61A
rd
Manual 3
Ed.
January 2016

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Summary of Contents for Intel EMB-H61A

  • Page 1 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A EMB-H61A Manual 3 January 2016...
  • Page 2 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Copyright Notice This document is copyrighted, 2012. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice.
  • Page 3  CompactFlash™ is a trademark of the Compact Flash Association. ® ®  Intel is a trademark of Intel Corporation. ®  Microsoft Windows is a registered trademark of Microsoft Corp.  ITE is a trademark of Integrated Technology Express, Inc.
  • Page 4 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Packing List Before you begin installing your card, please make sure that the following materials have been shipped: ...

  • Page 5: Table Of Contents

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Contents Chapter 1 General Information 1.1 Features..............1-2 1.2 Specifications ............1-3 Chapter 2 Quick Installation Guide 2.1 Safety Precautions ..........
  • Page 6 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A 2.16 Digital I/O Connector (DIO) ........2-12 2.17 Debug Connector (DEBUG)......... 2-13 2.18 Front Panel Connector (F_PANEL) ...... 2-13 2.19 Inverter Connector (INV)........
  • Page 7 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Appendix D Digital Input & Output D.1 DIO Programming ..........D-2 D.2 Digital I/O Register..........D-3 D.3 Digital I/O Sample Program ........

  • Page 8: Chapter 1 General Information

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter General Information 1- 1 Chapter 1 General Information...

  • Page 9: Features

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 1.1 Features ®  Intel Socket 1155 for 3 Generation and Generation Core™ i5/Core™ i3 Processors Up to 35W ...

  • Page 10: Specifications

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 1.2 Specifications System ®  Processor Intel generation Core™ i5/i3 Processor, up to 35W  System Memory 204-pin dual-channel DDR3 1333/1066 SODIMM x 2, Max. 16 ®...
  • Page 11 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A  Gross Weight 1.1 lb (0.5 Kg) Operating Temperature 32˚F~ 140˚F (0˚C ~ 60˚C) ...
  • Page 12 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A  Digital I/O Supports 8-bit (4-in/ 4-out)  PS/2 Port Keyboard/ Mouse x 1 ...

  • Page 13: Chapter 2 Quick Installation Guide

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter Quick Installation Guide 2 - 1 Chapter 2 Quick Installation Guide...

  • Page 14: Safety Precautions

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.1 Safety Precautions Always completely disconnect the power cord from your board whenever you are working on it.

  • Page 15: Location Of Connectors And Jumpers

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.2 Location of Connectors and Jumpers Component Side 2 - 3 Chapter 2 Quick Installation Guide...
  • Page 16 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Solder Side 2 - 4 Chapter 2 Quick Installation Guide...

  • Page 17: Mechanical Drawing

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.3 Mechanical Drawing Component Side 2 - 5 Chapter 2 Quick Installation Guide...
  • Page 18 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Solder Side 2 - 6 Chapter 2 Quick Installation Guide...

  • Page 19: List Of Jumpers

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.4 List of Jumpers The board has a number of jumpers that allow you to configure your system to suit your application.
  • Page 20 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A CON14 COM1 & DVI-D Connector CON17 LAN1 and USB1/2 Connector CON18 LAN2 and USB3/4 Connector CON19 PS/2 KB&MS and USB5/6 Connector...

  • Page 21: Setting Jumpers

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.6 Setting Jumpers You configure your card to match the needs of your application by setting jumpers.

  • Page 22: Clear Cmos (Clrtc1)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.7 Clear CMOS (CLRTC1)) CLRTC1 Function Protected (Default) Clear 2.8 LVDS Panel Voltage Selection (J1) Function +3.3V (Default) 2.9 Inverter Voltage Selection (J2)

  • Page 23: Com1 Ring/+5V/+12V Selection (J5)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.12 COM1 Ring/+5V/+12V Selection (J5) Function +12V Ring (Default) 2.13 Internal COM Serial Port Connector (COM2 ~ COM6) Signal Signal (NC)

  • Page 24: 1000Base-T Ethernet Connector With Dock Usb 2.0 Connector (Con17/Con18)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.15 1000Base-T Ethernet Connector with Dock USB 2.0 Connector (CON17/CON18) Signal Signal USB2_DN2 USB2_DP2...

  • Page 25: Debug Connector (Debug)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A DIO_O#3 (DIO_P#7) DIO_O#4 (DIO_P#8) 2.17 Debug Connector (DEBUG) Signal LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 +3.3V...

  • Page 26: Inverter Connector (Inv)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.19 Inverter Connector (INV) Signal Inverter VCC Back Light Control Back Light Enable 2.20 LVDS Panel Signal Connector (LVDS) Signal Signal...

  • Page 27: Sata Power Connector (Pwr1)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A NOTE: LVDS connector Vendor: PINREX; Model: 712-76-30GWR8. Please refer the drawing below, notice the location of PIN1, PIN2, PIN29 and PIN30.

  • Page 28: Bios Programmable Connector (Spi)

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2.23 BIOS Programmable Connector (SPI) P in S ignal S ignal 2 5 B +V3.3SPI SPI_CS#...
  • Page 29 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter BIOS Setup Chapter 3 AMI BIOS Setup 3-1...

  • Page 30: System Test And Initialization

    3. The CMOS memory has lost power and the configuration information has been erased. The EMB-H61A CMOS memory has an integral lithium battery backup for data retention. However, you will need to replace the complete unit when it runs down.

  • Page 31: Ami Bios Setup

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration.
  • Page 32 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Setup Menu Setup submenu: Main Setup submenu: Advanced Chapter 3 AMI BIOS Setup 3-4...
  • Page 33 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A ACPI Settings Options summary : Suspend mode S1 (CPU Stop Clock) S3 (Suspend to Optimal Default, Failsafe RAM)
  • Page 34 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Trusted Computing Options summary: Security Disabled Optimal Default, Failsafe Device Support Default Enabled En/Disable TPM support.
  • Page 35 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Enable Take Ownership Disable Take Ownership TPM Clear Select one-time TPM operation. Item value returns to ‘None’ after next POST.
  • Page 36 E M B - H 6 1 A Options summary : Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default En/Disable CPU Hyper-Threading function Intel Disabled Optimal Default, Failsafe Virtualization Default Technology Enabled En/Disable Intel VT-x function Digital IO Configuration Chapter 3 AMI BIOS Setup 3-8...
  • Page 37 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Options summary : DIO_P# 1-4 Input Optimal Default, Failsafe Default Output Set GPIO as Input or Output DIO_P# 5-8 Input...
  • Page 38 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A SATA Configuration (IDE) SATA Configuration (AHCI) Chapter 3 AMI BIOS Setup 3-10...
  • Page 39 Disabled Default Configuration Enabled Compatible: Configure SATA controller #1 as a legacy compatible controller. Enhanced: Configure SATA controller #1 as a Intel enhanced controller. SATA Mode AHCI Default IDE: Configure SATA controllers as legacy IDE AHCI: Configure SATA controllers to operate in AHCI mode...
  • Page 40 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto...
  • Page 41 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Floppy Forced FDD Hard Disk CDROM If Auto. USB devices less than 530MB will be emulated as Floppy and remaining as Floppy and remaining as hard drive.
  • Page 42 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Serial Port Configuration Chapter 3 AMI BIOS Setup 3-14...
  • Page 43 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Options summary : F81866 ERP Function Disabled Default Enabled Enable or Disable ERP function. Serial Port Disabled Enabled...
  • Page 44 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A IO=3E8h; IRQ=10,11; IO=2E8h; IRQ=10,11 Allows BIOS to Select Serial Port resource. Change Settings Auto Default...
  • Page 45 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Allows BIOS to Select Serial Port resource. Change Settings Auto Default (Serial Port 5) IO=2D0h;...
  • Page 46 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A On-Module H/W Monitor Smart Fan Mode Configuration Chapter 3 AMI BIOS Setup 3-18...
  • Page 47 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Options summary : SYS/CPU Smart Fan Auto by RPM Default Control Auto by Duty-Cycle Manual by RPM Manual by...
  • Page 48 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Select target temperature source. JMB36X ATA Controller Configuration Setup submenu: Chipset Chapter 3 AMI BIOS Setup 3-20...
  • Page 49 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A PCH-IO Configuration Chapter 3 AMI BIOS Setup 3-21...
  • Page 50 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Options summary : Azalia Disabled Enabled Optimal Default, Failsafe Default Enabling/Disabling HD Audio controller. Azalia internal HDMI Disabled Optimal Default, Failsafe...
  • Page 51 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A System Agent (SA) Configuration Options summary : VT-d Disabled Enabled Default En/Disable chipset Virtualization Technology function.
  • Page 52 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Graphics Configuration Chapter 3 AMI BIOS Setup 3-24...
  • Page 53 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Options summary : Primary Display Auto Default IGFX Select which of IGFX/PEG Graphics device should be Primary Display.
  • Page 54 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 224M 256M 288M 320M 352M 384M 416M 448M 480M 512M 1024M Select DVMT 5.0 Pre-Allocated(Fixed) Graphics Memory size used by the Internal Graphics Device.
  • Page 55 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 640x480 24Bit 800x600 24Bit 1024x768 24Bit 1280x1024 48Bit 1600x1200 48Bit 800x480 18Bit 1280x768 18Bit...
  • Page 56 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Setup submenu: Boot Options summary : Bootup NumLock Default State Select the keyboard NumLock state. Quiet Boot Disabled Default...
  • Page 57 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A GateA20 Active Upon Request Default Always UPON REQUEST – GA20 can be disabled using BIOS services. ALWAYS –...
  • Page 58 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Setup submenu: Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password.
  • Page 59 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Removing the Password Highlight this item and type in the current password. At the next dialog box press Enter to disable password protection.

  • Page 60: Chapter 4 Driver Installation

    I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter Driver Installation Chapter 4 Driver Installation...
  • Page 61 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Follow the sequence below to install the drivers: Step 1 – Install Chipset Driver Step 2 –...
  • Page 62 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 4.1 Installation: Insert DVD-ROM into the DVD-ROM Drive. And install the drivers from Step 1 to Step 8 in order.
  • Page 63 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A 2. Double click on Setup.exe file located in each OS folder 3.
  • Page 64 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter4 Drivers Installation...
  • Page 65 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter 4 Driver Installation...
  • Page 66 I n d u s t r i a l M o t h e r b o a r d E M B - H 6 1 A Chapter4 Drivers Installation...

  • Page 67: Appendix A Programming The Watchdog Timer

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Appendix Programming the Watchdog Timer Appendix A Programming the Watchdog Timer A-1...

  • Page 68: Watchdog Timer Initial Program

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E...
  • Page 69 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 70 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig();...
  • Page 71 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting...
  • Page 72 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value)

  • Page 73: Appendix B I/O Information

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Appendix I/O Information B - 1 Appendix B I/O Information...

  • Page 74: I/O Address Map

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B.1 I/O Address Map B - 2 Appendix B I/O Information...
  • Page 75 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B - 3 Appendix B I/O Information...

  • Page 76: St Mb Memory Address Map

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B.2 1 MB Memory Address Map B - 4 Appendix B I/O Information...

  • Page 77: Irq Mapping Chart

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B.3 IRQ Mapping Chart B - 5 Appendix B I/O Information...
  • Page 78 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B - 6 Appendix B I/O Information...

  • Page 79: Dma Channel Assignments

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A B.4 DMA Channel Assignments B - 7 Appendix B I/O Information...

  • Page 80: Appendix C Mating Connector

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Appendix Mating Connector C - 1 Appendix C Mating Connector...

  • Page 81: List Of Mating Connectors And Cables

    I n d u s t r i al M o t he r b o ar d E M B - H6 1 A C.1 List of Mating Connectors and Cables The table notes mating connectors and available cables. Connector Function Mating Connector...
  • Page 82 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A CON4 Compact Flash Slot PROCONN CFH050-A0-53G6 DEBUG Debug Connector ACES 87212-12G0 DIMM_A1 DIMM1 Slot FOXCONN ATNA291-AED-4F DIMM_B1 DIMM2 Slot...
  • Page 83 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A Appendix Electrical Specifications for I/O Ports Appendix D Electrical Specifications for I/O Ports...
  • Page 84 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A D.1 DIO Programming EMB-H61A utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application.
  • Page 85 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A D.2 Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1)
  • Page 86 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A D.3 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 87 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note27 #define byte DOutput1Reg // This parameter is represented from Note28 #define byte DOutput1Bit // This parameter is represented from Note29 #define byte DOutput1Val // This parameter is represented from Note30...
  • Page 88 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low...
  • Page 89 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ;...
  • Page 90 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value)
  • Page 91 I n d u s t r i al M o t he r b o ar d E M B - H6 1 A ************************************************************************************ SIOBitRead(byte LDN, byte Register, byte BitNum) Boolean Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= (1 <<...

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