Power Supply Circuit; Temperature Detection Circuit; Dsp; Fpga - Kenwood TK-5710 Service Manual

written by the FPU (KPG-95D), and firmware program (User
mode, Test mode, Tuning mode, etc.). This data must be
rewritten when replacing the flash memory.
■ EEPROM
Note : The EEPROM (IC701) stores tuning data (Deviation,
Squelch, etc.).
Realign the transceiver after replacing the EEPROM.
■ Real-time clock
The clock function is based on real-time clock IC (IC700).
When the power supply is off, it is backed up by an internal
secondary lithium battery.
IC703
CPU
FLASH
IC712
Fig. 12 Memory circuit
IC725
9.216MHz
IC703
(2/3,3/3)
CPU
9.216MHz
IC715

DSP

18.432MHz
IC730

FPGA

18.432MHz
IC724
CODEC
Fig. 13 Clock diagram

6-2. Temperature Detection Circuit

The temperature detection circuit detects the
temperature using a temperature IC (IC702) and corrects the
thermal characteristic change of the squelch.
6-3. DSP
The DSP circuit consists of a DSP IC (IC715), a CODEC IC
(IC724) and processes the base band signal. The DSP IC op-
erates on an external clock of 9.216MHz (the same as the
CPU), the I/O section operates at 3.3V and the core section
operates at 1.5V. The DSP IC carries out the following pro-
cesses:
• C4FM encoding
• Analog FM pre-emphasis/de-emphasis
• Vocoder (IMBE) processing between audio codec and
modulation/ demodulation
• CAI processing, such as error correction encoding
• QT/DQT encoding/ decoding
• DTMF encoding/ decoding
• MSK encoding/ decoding
• 2-tone decoding
• Compressor/ expander processing
• Transmit/ receive audio filtering processing
CIRCUIT DESCRIPTION
IC701
EEPROM
IC725 X701
IC721 (1/3) VCXO
18.432MHz
TK-5710
• Microphone amplifier AGC processing
• Audio mute processing
• Modulation level processing
6-4. FPGA
The FPGA IC (IC730) I/O section operates at 3.3V and the
core section operates at 2.5V. The FPGA IC has the following
function.
• Demodulation (C4FM,CQPSK)
• Shift register (8CH)
• Level convert Buffer amplifier(5V➝3.3V)(9CH)
• Generates 1.536MHz for the demodulation and CODEC

7. Power Supply Circuit

The voltage is always applied from +B. D719 protects
IC705 (DFF) against overvoltage.
Pulses from power switch are fed to the IC705 clock line
and the CPU (IC703). These clock pulses reverse the output
from High (The transceiver is turned OFF) to Low (The trans-
ceiver is turned ON), but it does not reverse the output from
Low to High. The CPU (IC703) output the pulse to the S2
(SET2) terminal (pin 8) of IC705 to reverse the output from
Low to High.
IGN is connected to the R2 (RESET2) terminal (pin 10) of
IC705 and the CPU (IC703). When the IC705 reset voltage is
increased, the output changes to Low (The transceiver is
turned ON). When IGN voltage is decreased, the CPU (IC703)
output the pulse to the S2 terminal (pin 8) of IC705 to reverse
the output from Low to High after the programmed time ex-
pires (Timed power-off function).
If 24V is supplied to the transceiver by mistake, Q707
turns on, Q710 turns off, the power is forced to be turned off.
This circuit consists of IC706 (8V), IC707 (5V), IC708
(3.3V), IC710 (3.3V), IC711 (2.5V) and IC709 (1.5V).
+B
R702
D719
AVR
D720
SW
Q711,
IC705 Q709
Q712
DFF
SW
Q705,
D722 Q708
Q706
SW SW
SW
D723 IC703 Q704
AVR CPU SW
Q728
SW
IGN
Fig. 14 Power supply circuit
( )
B /5710H
D724 D725 Q713
SW SW SW
Q707 Q710
SW SW
SW
PSW
( )
B
SB
31