HP 98640A Installation And Reference Manual page 9

7-channel analog input interface
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98640A Analog Input Interface
4-10
Line5 ..........................................................
4-11
iClat ion5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4-11
Note on :8ASIC Syntax ..••.•••••••••..••...•.•..•.•.•.....•.•..•....•...••. 4-13
MAINTENANCE
ew. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
Preparing to test the A-TO-D card .....••........•.••••.••.•..•••••••••••.• 5-1
Mi nimunl equipment requi rement s •••..•.....•.....••..•••.•••••.•.•.•••..•• 5-1
Installing test assembly ..•.••..•••...•........•..•.....•.•.•...•..••.•. 5-1
1
I nstiall Peripherals ..•••..••...•••........•..•..•..••.•..•.••••••••... 5-2
Connecting the test assembly ..••.•.•••...•.....•...........••.•.•..... 5-2
Verification Test .........••.....••.•...•..•......•..............•........ 5-3
lew. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 - 3
Loading the verification program .•..•.•....•..••.•.•..•.......•....•.•.. 5-3
Sequ1ence ..............................................................
5- 3
Test~5
Performed .....................................•.........•....... 5-4
Prograrn run ............................................................. 5-4
I
nsti~
lIed ADCs ....•....................•...•..........•............... 5-4
Set
I~epet
i t ions ...........................•................•..•....... 5-4
Pace Timer Test .•.......•.................•.........•..•.....•.......• 5-4
Select Readings to Display .............•.....•...•••..•..•....•....... 5-4
Run-Error Reporting .............................•................•.... 5-5
Verification ...........•.........•..•..•..•........•.•....... 5-5
On Failure •••..........•.....•....••.......•...•........................ 5-5
Error' Codes ....................•..........•.....•..................... 5-6
Organization ......................................................•....... 6-1
Ava i lab i .1 i t y .............................................................. 6-1
A-to-D card •.•.......................................................... 6-2
wire
tl~rmination
assembly ................•......•...•................... 6-5
test a!5sembly ...•...............................•.......•..•............ 6-6
DIAGRAMS
Resistor network ......................•....•.....•..•....•........•....... 7-2
Component Location
A-to-D card and wire term. assy ..........•..•.........•....•............ 7-3
T est a !5 s emb I
y. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 - 4
Schematic: diagrams
A-to-D card .........................................................•... 7-5
wi ret
I:!
rm. as sy ........................................................ 7 -11
t
est a!5 s emb I y. . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ......•.•..•........... 7 -1 2
PROM code .................................................•............ 7-13
INADVERTANT GROUND:
A SAFETY CONSIDERATION ............••..........••..•..•. A-1
Glossary .......................................................•............ G-1
v

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