Table of Contents
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signals
PROM as source, 3-13
transitions, 3-1 7
signed binary, 4-4
signed zero, 4-4
specifications, 1- 3
speed limits, 4 - 9
standard device assignments, 2 - 3
static electricity, 2-1
status bit(Busy- bit), 3-19
stopping the coun ter (see PROM control), 3 - 1 4
strain relief, 2
-I
2
switch settings
address selection, 2 - 2
BASIC, 2-4
factory set, 2- 2
interrupts, 2 - 2, 2-5, 3 - 2 3
limitations, 2-4
logical state, 2 - 2
Pascal, 2-4
select code, 2 - 2, 3 - 20
SYCLK (system clock), 3- 3
system clock, see SYCLK, 3- 3
system designers guide, 3-1
T
test assembly, 1-2,2-7, 5-2
testing, see verifying operation
Theory of Operation, conventions, 3-1
thumbscrews, 1-1,2-7
transor bs, 1 - 3, 3 - 5
u
unpacking, 2-1
v
verification software, 1-2
verifying operation, 5-1
"display errors?", 5 - 4
minimum equipment, 5-1
test assembly, 5 - 2
run -time errors, 5 - 5
voltage
diff eren tial, 1 - 1
full scale, 1-1, 1-4
input offset, 1-1
range, 1-1
maximum (full scale), 1-1
minimum (full scale), 1-1
INDEX-7
98640A Analog Input Interface
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