Sr530 Block Diagram - Stanford Research Systems SR530 Manual

SR530 Block Diagram

Several new concepts are used to simplify the
design of SR530 lock-in amplifier. In addition to
implementing recent advances in linear integrated
circuit technology, the instrument was designed to
take full advantage of its microprocessor controller
to improve performance and to reduce cost.
As an example of the new techniques used in the
SR530, consider the harmonic rejection problem.
Previously, lock-in amplifiers used a PLL with a
square wave output. The Fourier components of
the square wave created a serious problem -- the
lock-in would respond to signal and noise at f, 3f,
5f,.ad infinitum. Quite often, one component of
this picket fence of frequencies would land on
some noise source, giving a spurious result. To
overcome this difficulty designers employed tuned
amplifiers or heterodyning techniques. All of these
'fix-ups' had drawbacks, including phase and
amplitude errors, susceptibility to drift, and card-
swapping to change frequencies.
In contrast, the SR530 detects the signal by
mixing a reference sine wave in a precision analog
multiplier. Because of the low harmonic content of
this sine wave, the instrument is insensitive to
harmonics. This approach has eliminated the
difficulty, performance compromises, and cost of
the older techniques.
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