Intel SPSH4 Technical Product Specification page 76

SCSI Bay Boardset
6.5.2.2 P1
P1 has two dedicated-function signals, and six implementation specific control signals, as
shown in Table 51.
Bit Name
7 SDA
6 SCL
5 I2C_ADDR_CNTR
L
4 SCSI ctrlr reset
3 SCSI_DRQ
2 Fan Power
1 SDA_Local
0 SCL_Local
1. "Fixed" indicates whether the function/pin is defined by the microcontroller pinout (fixed) or implementation-
specific (not fixed)
6.5.2.3 P2
P2 is the high-order address and data bus for external device access. It is not used for general
I/O purposes.
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SPSH4 Server System External Product Specification
Table 51: P1 Functions
I/O Fixed
1
2
I/O Y I C Serial Data signal for the intra-chassis I
2
I/O Y I C Serial Clock signal for the intra-chassis I
2
I N I C address control:
•
•
Following the I
controller has an I
2
an I C address of 0xC2.
O N Reset SCSI controller.
•
•
I N SCSI DMA Request. Connected to the DRQ signal of the 53C80S
SCSI chip. Allows the microcontroller to use the DMA transfer
capabilities of the SCSI interface chip, which results in higher
performance.
O N Switches fan power on or off.
•
•
I/O N Serial Data for private I
O N Serial Clock for private I
Function
1=primary HSBP controller
0=secondary HSBP controller
2
C Address Allocation Specification the primary HSBP
2
C address of 0xC0 and the secondary controller has
If 0, places the 53C80S SCSI chip into reset
If 1, the SCSI interface chip comes out of reset and operates
normally.
0=on
1=off
2
C connection to temperature sensor
2
C connection to temperature sensor
2
C bus.
2
C bus.
Revision 1.11