BIOS Setup Utility
DRAM Control
DRAM Timing
DRAM CAS
Latency
Bank Interleave
Precharge to
Active(Trp)
Active to
Precharge(Tras)
Active to CMD
(Trcd)
DRAM Burst
Length
DRAM Command
Rate
DRAM Access
Time
DRAM Queue
Depth
DRAM tWTR
Setting
Description
By SPD
If enable the DRAM will auto
detect the DRAM timing.
Manual
When synchronous DRAM is
3
installed, the number of clock
cycles of CAS latency depends
2.5
on the DRAM timing. Do not
reset this field from the default
2
value specified by the system
1.5
designer.
Disabled
Increase DRAM performance.
2 Bank
4 Bank
2T
Increase DRAM performance.
3T
5T
Increase DRAM performance.
6T
2T
Increase DRAM performance.
3T
4
Increase DRAM performance.
8
2T Command
Increase DRAM performance.
1T Command
2T
Increase DRAM performance.
3T
2 Level
Increase DRAM performance.
4 Level
3 Level
1T
Increase DRAM performance.
3T
53
SY-KT400 DRAGON Ultra
Note
Default
Default
Default
Default
Default
Default
Default
Default
Default
Default
Default